IDT7207L50PB(1996) Ver la hoja de datos (PDF) - Integrated Device Technology

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IDT7207L50PB
(Rev.:1996)

CMOS ASYNCHRONOUS FIFO 32,768 x 9

Integrated Device Technology 

IDT7207 CMOS ASYNCHRONOUS FIFO

32,768 x 9

MILITARY AND COMMERCIAL TEMPERATURE RANGES

(HALF–FULL FLAG) (HF)

WRITE (W)

9

DATA IN (D)

FULL FLAG (FF)

RESET (RS)

IDT

9

7207

READ (R)

DATA OUT (Q)

EMPTY FLAG (EF)

RETRANSMIT (RT)

EXPANSION IN (XI)

3140 drw 15

Figure 12. Block Diagram of 32,768 x 9 FIFO Used in Single Device Mode

18

9

DATAIN (D)

WRITE (W)

FULL FLAG (FF)

RESET (RS)

HF

9

IDT

7207

9

HF

IDT

7207

9

READ (R)

EMPTY FLAG (EF)

RETRANSMIT (RT)

XI

XI

18

DATA OUT (Q)

3140 drw 16

NOTE:

1. Flag detection is accomplished by monitoring the FF, EF and HF signals on either (any) device used in the width expansion configuration.

Do not connect any output signals together.

Figure 13. Block Diagram of 32,768 x 18 FIFO Memory Used in Width Expansion Mode

5.05

9

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