62381CHRTZ Ver la hoja de datos (PDF) - Renesas Electronics

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62381CHRTZ

High-Efficiency, Quad or Triple-Output System Power Supply Controller for Notebook Computers

Renesas Electronics 

ISL62381, ISL62382, ISL62383, ISL62381C, ISL62382C, ISL62383C

1.5ms

tSOFTSTART

2.75ms

PGOOD Delay

VOUT

VCC and LDO5

EN

FB

PGOOD

FIGURE 24. SOFT-START SEQUENCE FOR ONE SMPS

The PGOOD pin indicates when the converter is capable of

supplying regulated voltage. It is an undefined impedance if VIN is

not above the rising POR threshold or below the POR falling

threshold. When a fault is detected, these controllers will turn on

the open-drain NMOS, which will pull PGOOD low with a nominal

impedance of 63 or 95 This will flag the system that one of the

output voltages is out of regulation.

Separate enable pins allow for full soft-start sequencing. Because

low shutdown quiescent current is necessary to prolong battery

life in notebook applications, the LDO5 5V LDO is held off until

any of the three enable signals (EN1, EN2 or LDO3EN) is pulled

high. Soft-start of all outputs will only start until after LDO5 is

above the 4.2V POR threshold. In addition to user-programmable

sequencing, these controllers include a pre-programmed

sequential SMPS soft-start feature. Table 1 shows the SMPS

enable truth table.

TABLE 1. SMPS ENABLE SEQUENCE LOGIC

EN1

EN2

START-UP SEQUENCE

0

0

Both SMPS outputs OFF simultaneously

0

Float

Both SMPS outputs OFF simultaneously

Float

0

Both SMPS outputs OFF simultaneously

Float

Float

Both SMPS outputs OFF simultaneously

0

1

SMPS1 OFF, SMPS2 ON

1

0

SMPS1 ON, SMPS2 OFF

1

1

Both SMPS outputs ON simultaneously

Float

1 SMPS1 enables after SMPS2 is in regulation

1

Float SMPS2 enables after SMPS1 is in regulation

VCC1

The VCC1 nominal operation voltage is 5V. If EN1, EN2 and

LDO3EN are all logic low, the VCC1 start-up voltage is 3.6V

when VIN is applied on these controllers. LDO5 is held off until

any of the three enable signals (EN1, EN2 or LDO3EN) is

pulled high. When LDO5 is above the 4.2V VCC1 POR

threshold, VCC1 will switchover to LDO5 internally.

After VIN is applied, the VCC1 start-up 3.6V voltage can be used

as the logic high signal of any of EN1, EN2 and LDO3EN to

enable PVCC if there is no other power supply on the board.

MOSFET Gate-Drive Outputs LGATE and UGATE

These controllers have internal gate-drivers for the high-side and

low-side N-Channel MOSFETs. The low-side gate-drivers are

optimized for low duty-cycle applications where the low-side

MOSFET conduction losses are dominant, requiring a low

r DS(ON) MOSFET. The LGATE pull-down resistance is small in

order to clamp the gate of the MOSFET below the VGS(th) at turn-

off. The current transient through the gate at turn-off can be

considerable because the gate charge of a low r DS(ON) MOSFET

can be large. Adaptive shoot-through protection prevents a gate-

driver output from turning on until the opposite gate-driver output

has fallen below approximately 1V. The dead-time shown in

Figure 25 is extended by the additional period that the falling gate

voltage stays above the 1V threshold. The typical dead-time is

21ns. The high-side gate-driver output voltage is measured

across the UGATE and PHASE pins while the low-side gate-

driver output voltage is measured across the LGATE and PGND

pins. The power for the LGATE gate-driver is sourced directly

from the LDO5 pin. The power for the UGATE gate-driver is

sourced from a “boot” capacitor connected across the BOOT and

PHASE pins. The boot capacitor is charged from the 5V LDO5

supply through a “boot diode” each time the low-side MOSFET

turns on, pulling the PHASE pin low. These controllers have

integrated boot diodes connected from the LDO5 pins to BOOT

pins.

tLGFUGR

UGATE

LGATE

50%

50%

tUGFLGR

FIGURE 25. LGATE AND UGATE DEAD-TIME

Diode Emulation

FCCM is a logic input that controls the power state of these

controllers. If forced high, these controllers will operate in

forced continuous-conduction-mode (CCM) over the entire

load range. This will produce the best transient response to all

load conditions, but will have increased light-load power loss. If

FCCM is forced low, these controllers will automatically

operate in diode-emulation-mode (DEM) at light load to

optimize efficiency in the entire load range. The transition is

FN6665 Rev 6.00

October 23, 2015

Page 15 of 24

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