HA-2839
Test Circuit and Waveforms (Continued)
V+ 0.001µF
INPUT
200Ω
1µF
-
+
0.001µF
500Ω
SETTLING
POINT
1µF
V-
2kΩ
5kΩ
OUTPUT
PROBE
MONITOR
NOTES:
18. AV = -10.
19. Load Capacitance should be less than 10pF.
20. It is recommended that resistors be carbon composition and
that feedback and summing network ratios be matched to 0.1%.
21. SETTLING POINT (Summing Node) capacitance should be
less than 10pF. For optimum settling time results, it is
recommended that the test circuit be constructed directly onto
the device pins. A Tektronix 568 Sampling Oscilloscope with
S-3A sampling heads is recommended as a settle point monitor.
SETTLING TIME TEST CIRCUIT
Typical Performance Curves TA = 25oC, VSUPPLY = ±15V, RL = 1kΩ, CL < 10pF, Unless Otherwise Specified
100
80
60
40
20
0
AVCL = 1000
OPEN LOOP
AVCL = 100 AVCL = 10
0
90
OPEN LOOP
180
1K
10K
100K
1M
10M 100M
FREQUENCY (Hz)
650
600
550
500
5 6 7 8 9 10 11 12 13 14 15
SUPPLY VOLTAGE (±V)
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS GAINS FIGURE 2. GAIN BANDWIDTH PRODUCT vs SUPPLY VOLTAGE
750
90
650
80
70
550
60
450
50
40
350
30
250
-60 -40 -20
0 20 40 60 80
TEMPERATURE (oC)
100 120 140
20
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FIGURE 3. GAIN BANDWIDTH PRODUCT vs TEMPERATURE
FIGURE 4. CMRR vs FREQUENCY
3-4