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ICS844256D

FemtoClock® Crystal-to-LVDS Frequency Synthesizer w/Integrated Fanout Buffer

Integrated Device Technology 

ICS844256D Data Sheet

FEMTOCLOCK® CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

Recommendations for Unused Input and Output Pins

Inputs:

LVCMOS Control Pins

All control pins have internal pullups or pulldowns; additional

resistance is not required but can be added for additional protection.

A 1kΩ resistor can be used.

Outputs:

LVDS Outputs

All unused LVDS output pairs can be either left floating or terminated

with 100Ω across. If they are left floating, we recommend that there

is no trace attached.

LVDS Driver Termination

A general LVDS interface is shown in Figure 4. Standard termination

for LVDS type output structure requires both a 100Ω parallel resistor

at the receiver and a 100Ω differential transmission line environment.

In order to avoid any transmission line reflection issues, the 100Ω

resistor must be placed as close to the receiver as possible. IDT

offers a full line of LVDS compliant devices with two types of output

structures: current source and voltage source. The standard

termination schematic as shown in Figure 4 can be used with either

type of output structure. If using a non-standard termination, it is

recommended to contact IDT and confirm if the output is a current

source or a voltage source type structure. In addition, since these

outputs are LVDS compatible, the input receivers amplitude and

common mode input range should be verified for compatibility with

the output.

LVDS Driver

100Ω

+

LVDS

Receiver

–

100Ω Differential Transmission Line

Figure 4. Typical LVDS Driver Termination

ICS844256DG REVISION A AUGUST 5, 2010

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©2010 Integrated Device Technology, Inc.

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