ISD4003 Ver la hoja de datos (PDF) - Winbond

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componentes Descripción

Fabricante

ISD4003

SINGLE-CHIP, MULTIPLE-MESSAGES VOICE RECORD/PLAYBACK DEVICES 4-, 5-, 6-, AND 8-MINUTE DURATION

Winbond 

ISD4003 SERIES

PIN NAME

XCLK

SCLK

PIN NO.

SOIC /

PDIP

TSOP

26

6

28

8

FUNCTION

External Clock Input: The pin has an internal pull-down

device. The ISD4003 series is configured at the factory with

an internal sampling clock frequency centered to ±1

percent of specification. The frequency is then maintained

to a variation of ±2.25 percent over the entire commercial

temperature and operating voltage ranges. The internal

clock has a –6/+4 percent tolerance over the extended

temperature, industrial temperature and voltage ranges. A

regulated power supply is recommended for industrial

temperature range parts. If greater precision is required,

the device can be clocked through the XCLK pin as follows:

Part Number

Sample Rate

Required Clock

ISD4003-04M

8.0 kHz

1024 kHz

ISD4003-05M

6.4 kHz

819.2 kHz

ISD4003-06M

5.3 kHz

682.7 kHz

ISD4003-08M

4.0 kHz

512 kHz

These recommended clock rates should not be varied

because the anti-aliasing and smoothing filters are fixed.

Otherwise, aliasing problems can occur if the sample rate

differs from the one recommended. The duty cycle on the

input clock is not critical, as the clock is immediately

divided by two. If the XCLK is not used, this input must

be connected to ground.

Serial Clock: This is the input clock to the ISD4003 device.

It is generated by the master device (typically

microcontoller) and is used to synchronize the data transfer

in and out of the device through the MOSI and MISO lines,

respectively. Data is latched into the ISD4003 on the rising

edge of SCLK and shifted out of the device on the falling

edge of SCLK.

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