DS1244 Ver la hoja de datos (PDF) - Unspecified

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DS1244

256k NV SRAM with Phantom Clock

Unspecified 

POWER-DOWN/POWER-UP CONDITION, 3.3V

DS1244/DS1244P

256k NV SRAM

with Phantom Clock

AC TEST CONDITIONS

Output Load:

Input Pulse Levels:

50pF +1TTL Gate

0 to 3V

Timing Measurement Reference Levels

Input: 1.5V

Output: 1.5V

Input Pulse Rise and Fall Times: 5ns

NOTES:

1)

is high for a read cycle.

2)

= VIH or VIL. If = VIH during write cycle, the output buffers remain in a high-impedance state.

3) tWP is specified as the logical AND of

and . tWP is measured from the latter of

or going low to the earlier of

or going high.

4) tDH, tDS are measured from the earlier of

or going high.

5) These parameters are sampled with a 50pF load and are not 100% tested.

6) If the

low transition occurs simultaneously with or later than the low transition in Write Cycle 1, the output buffers

remain in a high-impedance state during this period.

7) If the

high transition occurs prior to or simultaneously with the high transition, the output buffers remain in a

high-impedance state during this period.

8) If is low or the low transition occurs prior to or simultaneously with the

low transition the output buffers remain in

a high impedance state during this period.

9) The expected tDR is defined as cumulative time in the absence of Vcc with the clock oscillator running.

10) tWR is a function of the latter occurring edge of or .

11) Voltages are referenced to ground.

12)

(Pin 1) has an internal pullup resistor.

13) RTC modules can be successfully processed through conventional wave-soldering techniques as long as temperature

exposure to the lithium energy source contained within does not exceed +85℃. Post solder cleaning with water-washing

techniques is acceptable, provided that ultrasonic vibration is not used.

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