CY7C1440AV33(2005) Ver la hoja de datos (PDF) - Cypress Semiconductor

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componentes Descripción

Fabricante

CY7C1440AV33
(Rev.:2005)

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM

Cypress Semiconductor 

PRELIMINARY

CY7C1440AV33

CY7C1442AV33

CY7C1446AV33

Logic Block Diagram – CY7C1446AV33 (512K x 72)

A0, A1,A

MODE

ADDRESS

REGISTER

A[1:0]

ADV

CLK

ADSC

ADSP

Q1

BINARY

COUNTER

CLR

Q0

BWH

BWG

BWF

BWE

BWD

BWC

BWB

BWA

BWE

GW

CE1

CE2

CE3

OE

DQH, DQPH

WRITE DRIVER

DQF, DQPF

WRITE DRIVER

DQF, DQPF

WRITE DRIVER

DQE, DQPE

WRITE DRIVER

DQD, DQPD

WRITE DRIVER

DQC, DQPC

WRITE DRIVER

DQB, DQPB

WRITE DRIVER

DQA, DQPA

WRITE DRIVER

ENABLE

REGISTER

PIPELINED

ENABLE

DQH, DQPH

WRITE DRIVER

DQG, DQPG

WRITE DRIVER

DQF, DQPF

WRITE DRIVER

DBQYET,ED“QaP”E

WRITE DRIVER

DQD, DQPD

WRITE DRIVER

DQC, DQPC

WRITE DRIVER

DQB, DQPB

WRITE DRIVER

DQA, DQPA

WRITE DRIVER

SLEEP

ZZ

CONTROL

MEMORY

ARRAY

SENSE

AMPS

OUTPUT

REGISTERS

OUTPUT

BUFFERS

E

INPUT

REGISTERS

DQs

DQPA

DQPB

DQPC

DQPD

DQPE

DQPF

DQPG

DQPH

Document #: 38-05383 Rev. *B

Page 3 of 27

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