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LT6372IUDC-1-PBF

Precision Instrumentation Amplifier with Level Shift and Output Clamping

Analog Devices 

LT6372-1

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified

temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = VREF1 = VREF2 = 0V, VCLLO = V–, VCLHI = V+, RL = 2kΩ.

SYMBOL

RREFIN

IREFIN

PARAMETER

REF Input Resistance

REF Input Current

VREF

AVREF

REF Voltage Range

REF Gain to Output

REF Gain Error

CLLO Input Current

CLHI Input Current

CLLO Input Operating Voltage Range

CLHI Input Operating Voltage Range

CONDITIONS

REF1 or REF2, Untested REF pin floating

V+IN = V–IN = VREF1 = VREF2= 0V, REF1 or REF2

REF1 or REF2

VREF1 = 0V to 5V, VREF2 = 0V

VREF1 = 0V to 5V, VREF2 = 0V

VCLLO = 0V

VCLHI = 5V

Outside this range CLLO is disabled

Outside this range CLHI is disabled

MIN

–20

l –30

l V–

–175

l –200

l

l

l V– + 3

l V– + 2

TYP MAX UNITS

30

kΩ

–14

–7

μA

3

μA

V+

V

0.5

V/V

±50

175

ppm

200

ppm

1

μA

1

μA

V+ – 2

V

V+ – 2.5

V

CLLO Clamp Voltage (VOUT – VCLLO)

CLHI Clamp Voltage (VOUT – VCLHI)

–0.57 –0.45

V

l –0.74

V

0.45 0.55

V

l

0.755

V

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: Gains higher than 1000 are possible but the resulting low RG values

can make PCB and package lead resistance a significant error source.

Note 3: Gain tests are performed with –IN at mid-supply and +IN driven.

Note 4: When the gain is greater than 1 the gain error and gain drift

specifications do not include the effect of external gain set resistor RG.

Note 5: This specification is guaranteed by design.

Note 6: This specification is guaranteed with high-speed automated testing.

Note 7: This parameter is measured in a high speed automatic tester that

does not measure the thermal effects with longer time constants. The

magnitude of these thermal effects are dependent on the package used,

PCB layout, heat sinking and air flow conditions.

Note 8: For more information on how offsets relate to the amplifiers, see

section “Input and Output Offset Voltage” in the Applications section.

Note 9: Hysteresis in output voltage is created by mechanical stress

that differs depending on whether the IC was previously at a higher or

lower temperature. Output voltage is always measured at 25°C, but

the IC is cycled to the hot or cold temperature limit before successive

measurements. Hysteresis is roughly proportional to the square of the

temperature change. For instruments that are stored at well controlled

temperatures (within 20 or 30 degrees of operational temperature),

hysteresis is usually not a significant error source. Typical hysteresis is the

worst case of 25°C to cold to 25°C or 25°C to hot to 25°C, preconditioned

by one thermal cycle.

Note 10: Referred to the input.

Rev. 0

For more information www.analog.com

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