CLRC63201T Ver la hoja de datos (PDF) - NXP Semiconductors.

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CLRC63201T

Standard multi-protocol reader solution

NXP Semiconductors. 

NXP Semiconductors

CLRC632

Standard multi-protocol reader solution

Remark: The following points apply to initialization:

• the Page register (addressed using 10h, 18h, 20h, 28h) is skipped and not initialized.

• make sure that all PreSetxx registers are not changed.

• make sure that all register bits that are reserved are set to logic 0.

9.2.2.1 StartUp register initialization file (read/write)

The EEPROM memory block address 1 and 2 contents are used to automatically set the

register subaddresses 10h to 2Fh during the initialization phase. The default values stored

in the EEPROM during production are shown in Section 9.2.2.2 “Factory default StartUp

register initialization file”.

The byte assignment is shown in Table 14.

Table 14. Byte assignment for register initialization at start-up

EEPROM byte address

Register address

10h (block 1, byte 0)

10h

11h

11h

…

…

2Fh (block 2, byte 15)

2Fh

Remark

skipped

copied

…

copied

9.2.2.2 Factory default StartUp register initialization file

During the production tests, the StartUp register initialization file is initialized using the

default values shown in Table 15. During each power-up and initialization phase, these

values are written to the CLRC632’s registers.

CLRC632

Product data sheet

COMPANY PUBLIC

All information provided in this document is subject to legal disclaimers.

Rev. 3.7 — 27 February 2014

073937

© NXP Semiconductors N.V. 2014. All rights reserved.

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