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CLRC63201T Datasheet PDF : 127 Pages
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NXP Semiconductors
CLRC632
Standard multi-protocol reader solution
Table 15. Shipment content of StartUp configuration file
EEPROM Register Value
byte
address
address
Symbol
Description
10h
10h
00h Page
free for user
11h
11h
58h TxControl
transmitter pins TX1 and TX2 are switched off, bridge driver
configuration, modulator driven from internal digital circuitry
12h
12h
3Fh CwConductance
source resistance of TX1 and TX2 is set to minimum
13h
13h
3Fh ModConductance
defines the output conductance
14h
14h
19h CoderControl
ISO/IEC 14443 A coding is set
15h
15h
13h ModWidth
pulse width for Miller pulse coding is set to standard configuration
16h
16h
3Fh ModWidthSOF
pulse width of Start Of Frame (SOF)
17h
17h
3Bh TypeFraming
ISO/IEC 14443 A framing is set
18h
18h
00h Page
free for user
19h
19h
73h RxControl1
ISO/IEC 14443 A is set and internal amplifier gain is maximum
1Ah
1Ah
08h DecoderControl
bit-collisions always evaluate to HIGH in the data bit stream
1Bh
1Bh
ADh BitPhase
BitPhase[7:0] is set to standard configuration
1Ch
1Ch
FFh RxThreshold
MinLevel[3:0] and CollLevel[3:0] are set to maximum
1Dh
1Dh
1Eh BPSKDemControl ISO/IEC 14443 A is set
1Eh
1Eh
41h RxControl2
use Q-clock for the receiver, automatic receiver off is switched on,
decoder is driven from internal analog circuitry
1Fh
1Fh
00h ClockQControl
automatic Q-clock calibration is switched on
20h
20h
00h Page
free for user
21h
21h
06h RxWait
frame guard time is set to six bit-clocks
22h
22h
03h ChannelRedundancy channel redundancy is set using ISO/IEC 14443 A
23h
23h
63h CRCPresetLSB
CRC preset value is set using ISO/IEC 14443 A
24h
24h
63h CRCPresetMSB
CRC preset value is set using ISO/IEC 14443 A
25h
25h
00h TimeSlotPeriod
defines the time for the I-CODE1 time slots
26h
26h
00h MFOUTSelect
pin MFOUT is set LOW
27h
27h
00h PreSet27
-
28h
28h
00h Page
free for user
29h
29h
08h FIFOLevel
WaterLevel[5:0] FIFO buffer warning level is set to standard
configuration
2Ah
2Ah
07h TimerClock
TPreScaler[4:0] is set to standard configuration, timer unit restart
function is switched off
2Bh
2Bh
06h TimerControl
Timer is started at the end of transmission, stopped at the beginning
of reception
2Ch
2Ch
0Ah TimerReload
TReloadValue[7:0]: the timer unit preset value is set to standard
configuration
2Dh
2Dh
02h IRQPinConfig
pin IRQ is set to high-impedance
2Eh
2Eh
00h PreSet2E
-
2Fh
2Fh
00h PreSet2F
-
CLRC632
Product data sheet
COMPANY PUBLIC
Remark: The CLRC632 default configuration supports the MIFARE and ISO/IEC 14443 A
communication scheme. Memory addresses 3 to 7 may be used for user-specific
initialization files such as I-CODE1, ISO/IEC 15693 or ISO/IEC 14443 B.
All information provided in this document is subject to legal disclaimers.
Rev. 3.7 — 27 February 2014
073937
© NXP Semiconductors N.V. 2014. All rights reserved.
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