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74HC163-Q100 Ver la hoja de datos (PDF) - Nexperia B.V. All rights reserved

Número de pieza
componentes Descripción
Fabricante
74HC163-Q100
NEXPERIA
Nexperia B.V. All rights reserved 
74HC163-Q100 Datasheet PDF : 19 Pages
First Prev 11 12 13 14 15 16 17 18 19
Nexperia
74HC163-Q100; 74HCT163-Q100
Presettable synchronous 4-bit binary counter; synchronous reset
VI
PE input
VM
GND
VI
CP input
tsu
th
VM
tsu
th
GND
VI
Dn input
tsu
th
VM
tsu
th
GND
aaa-012356
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 8.
Fig. 11. The data input (Dn) and parallel enable input (PE) set-up and hold times
VI
MR input
VM
GND
VI
CP input
tsu
th
VM
tsu
th
GND
aaa-012357
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 8.
Fig. 12. The master reset (MR) set-up and hold times
VI
CEP, CET
input
GND
VI
CP input
VM
tsu
th
VM
tsu
th
GND
aaa-012358
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 8.
Fig. 13. The count enable input (CEP) and count enable carry input (CET) set-up and hold times
Table 8. Measurement points
Type
Input
VM
74HC163-Q100
0.5 x VCC
74HCT163-Q100
1.3 V
VI
GND to VCC
GND to 3 V
Output
VM
0.5 x VCC
1.3 V
74HC_HCT163_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 12 October 2018
© Nexperia B.V. 2018. All rights reserved
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