STV7699
PIN ASSIGNMENT (PQFP100)
Pin Number
Symbol
Type
Function
100
VCC
Supply 5V Logic Supply
1 - 29 - 30 - 51 - 52 - 80
VPP
Supply High Voltage Supply of power outputs
6 - 15 - 24 - 35 - 40
46 - 57 - 66 - 75
VSSP
Ground Ground of power outputs
90 to 93
VSSLOG
Ground Logic Ground
41 - 81
VSSSUB
Ground Substrate Ground
2 to 5 - 7 to 14 - 16 to 23 OUT1 to OUT 64 Output Power Output
25 to 28 - 31 to 34 - 36 to 39
42 to 45 - 47 to 50 - 53 to 56
58 to 65 - 67 to 74 - 76 to 79
95
CLK
Input Clock of data shift register
Low to High transition makes the data enter into the shift
register and available at the output stage and at the output
of the shift register.
94
STB
Input Latch of data to outputs
When the STB signal is set to low level, data are transferred
into the latch stage. When STB is set at high level, data are
held in the latch stage.
88
BLK
Input Power Output Blanking Control
87
POL
Input Power Output Polarity Control
86
HIZ
Input Power Output High Impedance Control
89
F/R
Input Selection of shift direction
96 to 99
82 to 85
A4 to A1
B1 to B4
Input Shift register data input and output according to F/R value.
Output When set to low, Ai = input and Bi = output.
PIN ASSIGNMENT (Power Outputs)
Output N°
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin N°
2
3
4
5
7
8
9
10
11
12
13
14
16
17
18
19
Output N°
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Pin N°
20
21
22
23
25
26
27
28
31
32
33
34
36
37
38
39
Output N°
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin N°
42
43
44
45
47
48
48
50
53
54
55
56
58
59
60
61
Output N°
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Pin N°
62
63
64
65
67
68
69
70
71
72
73
74
76
77
78
79
2/9