CXA2067AS
I2C Bus Logic System
No.
Item
Symbol
Min.
Typ.
Max.
Unit
1 High level input voltage
VIH
3.0
—
5.0
V
2 Low level input voltage
VIL
0
—
1.5
V
Low level output voltage with 3 mA
3
VOL
0
—
0.4
V
SDA current inflow
4 Maximum clock frequency
fSCL
0
—
400
kHz
5 Minimum waiting time for data change
tBUF
4.0
—
—
µs
Minimum waiting time for data
6
transmission start
tHD : STA
4.0
—
—
µs
7 Low level clock pulse width
tLOW
4.7
—
—
µs
8 High level clock pulse width
Minimum waiting time for start
9
preparation
10 Minimum data hold time
tHIGH
4.0
—
—
µs
tSU : STA
4.7
—
—
µs
tHD : DAT
0
—
—
ns
11 Minimum data preparation time
tSU : DAT
250
—
—
ns
12 Rise time
tR
—
—
1
µs
13 Fall time
Minimum waiting time for stop
14
preparation
tF
—
—
300
ns
tSU : STO
4.7
—
—
µs
—9—