AGL600V5-CSG144YI データシートの表示（PDF） - Microsemi Corporation

部品番号

コンポーネント説明

メーカー

AGL600V5-CSG144YI

IGLOO Low Power Flash FPGAs with Flash* Freeze Technology

Microsemi Corporation 

IGLOO DC and Switching Characteristics

Package Thermal Characteristics

The device junction-to-case thermal resistivity is jc and the junction-to-ambient air thermal resistivity is

ja. The thermal characteristics for ja are shown for two air flow rates. The absolute maximum junction

temperature is 100°C. EQ 2 shows a sample calculation of the absolute maximum power dissipation

allowed for the AGL1000-FG484 package at commercial temperature and in still air.

Maximum Power Allowed = M-----a----x---.---j--u---n---c---t--i-o----n-----t-e----m-----p---.-----(----j-Ca---(-)----–C----M-/-W---a---)-x---.---a---m-----b----i-e---n----t---t--e---m-----p---.----(-----C----)- = 1----0--2-0---3---.-C-3---°-–--C---7-/--W0-------C-- = 1.28 W

EQ 2

Table 2-5 • Package Thermal Resistivities

Package Type

Quad Flat No Lead (QN)

Device Pin Count

jc

AGL030

132

13.1

ja

Still Air 1 m/s 2.5 m/s Unit

21.4

16.8

15.3 C/W

AGL060

132

11.0

21.2

16.6

15.0 C/W

AGL125

132

9.2

21.1

16.5

14.9 C/W

AGL250

132

8.9

21.0

16.4

14.8 C/W

AGL030

68

13.4

68.4

45.8

43.1 C/W

Very Thin Quad Flat Pack (VQ)*

100

Chip Scale Package (CS)

AGL1000

281

10.0

35.3

29.4

27.1 C/W

6.0

28.0

22.8

21.5 C/W

AGL400

196

7.2

37.1

31.1

28.9 C/W

AGL250

196

7.6

38.3

32.2

30.0 C/W

AGL125

196

8.0

39.5

33.4

31.1 C/W

AGL030

81

12.4

32.8

28.5

27.2 C/W

AGL060

81

11.1

28.8

24.8

23.5 C/W

AGL250

81

10.4

26.9

22.3

20.9 C/W

Micro Chip Scale Package (UC)

AGL030

81

16.9

40.6

35.2

33.7 C/W

Fine Pitch Ball Grid Array (FG)

AGL060

144

18.6

55.2

49.4

47.2 C/W

AGL1000

144

6.3

31.6

26.2

24.2 C/W

AGL400

144

6.8

37.6

31.2

29.0 C/W

AGL250

256

12.0

38.6

34.7

33.0 C/W

AGL1000

256

6.6

28.1

24.4

22.7 C/W

AGL1000

484

8.0

23.3

19.0

16.7 C/W

Note: *Thermal resistances for other device-package combinations will be posted in a later revision.

Disclaimer:

The simulation for determining the junction-to-air thermal resistance is based on JEDEC standards

(JESD51) and assumptions made in building the model. Junction-to-case is based on SEMI G38-88.

JESD51 is only used for comparing one package to another package, provided the two tests uses the

same condition. They have little relevance in actual application and therefore should be used with a

degree of caution.

2-6

Revision 23

Share Link: