FS6244-03(2000) データシートの表示（PDF） - AMI Semiconductor
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FS6244-03 Datasheet PDF : 8 Pages
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FS6244
Dual PLL Clock Generator IC
AMERICAN MICROSYSTEMS, INC.
April 2000
Table 2: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,
DO = Digital Output; P = Power/Ground; # = Active Low pin
PIN
TYPE
NAME
DESCRIPTION
1
-
N/C
No Connection
2
AO
XOUT
Crystal Oscillator Drive
3
AI
XIN
Crystal Oscillator Feedback
4
P
VDD
Power Supply (+3.3V or +5V)
5
P
VSS
Ground
6
DO
CLKA
Clock Output A
7
-
N/C
No Connection
8
-
N/C
No Connection
9
-
N/C
No Connection
10
DO
CLKC
Clock Output C
11
P
VSS
Ground
12
-
N/C
No Connection
13
P
VDD
Power Supply (+3.3V or +5V)
14
DO
CLKB
Clock Output B
15
-
N/C
No Connection
16
-
N/C
No Connection
3.0 Functional Block Description
3.1 Phase-Locked Loop (PLL)
The on-chip PLLs are a standard frequency- and phase-
locked loop architecture. The PLL multiplies the reference
oscillator to the desired frequency by a ratio of integers.
The frequency multiplication is exact with a zero synthe-
sis error unless otherwise indicated in the frequency ta-
ble.
3.2 Crystal Oscillator
The Crystal Oscillator provides a stable, low-jitter fre-
quency reference for the rest of the FS6244 system com-
ponents. Loading capacitance for the crystal is internal to
the FS6244. No external components (other than the
resonator itself) are required for operation of the crystal
oscillator.
2
ISO9001
4.26.00
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