NCP1203D データシートの表示（PDF） - ON Semiconductor

部品番号

コンポーネント説明

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NCP1203D

NCP1203D60R2G -> 1203P60 / SOIC−8 or PDIP−8 package

ON Semiconductor 

NCP1203

Adj

1

FB

2

CURRENT

SENSE

3

GROUND

4

HV

8

HV CURRENT

SOURCE

80 k

1.2 V

SKIP CYCLE

+ COMPARATOR

NC

-

UVLO HIGH AND LOW

7

INTERNAL VCC INTERNAL REGULATOR

24 k

Q FLIP−FLOP

250 ns

L.E.B.

40−60−100 kHz

CLOCK

SET DCmax = 80% Q

OVERLOAD

MANAGEMENT

VCC

6

RESET

20 k

57 k

VREF

+

−

25 k

+

-

1V

Drv

±250 mA

5

Figure 2. Internal Circuit Architecture

MAXIMUM RATINGS

Rating

Symbol

Value

Unit

Power Supply Voltage

VCC, Drv

16

V

Power Supply Voltage on all other pins except Pin 5 (Drv), Pin 6 (VCC) and Pin 8 (HV)

−

−0.3 to 10

V

Maximum Current into all pins except Pin 6 (VCC) and Pin 8 (HV) when

10 V ESD diodes are activated

−

5.0

mA

Thermal Resistance, Junction−to−Air, PDIP−8 Version

Thermal Resistance, Junction−to−Air, SOIC Version

Thermal Resistance, Junction−to−Case

Maximum Junction Temperature

Temperature Shutdown

RqJA

RqJA

RqJC

TJMAX

−

100

°C/W

178

57

150

°C

170

°C

Hysteresis in Shutdown

−

30

°C

Operating Temperature Range

Storage Temperature Range

ESD Capability, Human Body Model, All pins except Pin 6 (VCC) and Pin 8 (HV)

ESD Capability, Machine Model

TJ

−40 to +125

°C

Tstg

−60 to +150

°C

−

2.0

kV

−

200

V

Maximum Voltage on Pin 8 (HV) with Pin 6 (VCC) Decoupled to Ground with 10 mF

−

500

V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. This device series contains ESD protection rated using the following tests:

Human Body Model (HBM) 2000 V per JEDEC Standard JESD22, Method A114E.

Machine Model (MM) 200 V per JEDEC Standard JESD22, Method A115A.

www.onsemi.com

3

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