EMBEDDED ALGORITHMS
PRELIMINARY
Start
Write Erase Command Sequence
(see below)
Data Polling or Toggle Bit
Successfully Completed
Erasure Completed
Chip Erase Command Sequence
(Address/Command):
5555H/AAH
Individual Sector/Multiple Sector
Erase Command Sequence
(Address/Command):
5555H/AAH
2AAAH/55H
2AAAH/55H
5555H/80H
5555H/80H
5555H/AAH
5555H/AAH
2AAAH/55H
5555H/10H
2AAAH/55H
Sector Address/30H
Sector Address/30H
Sector Address/30H
Additional sector
erase commands
are optional
20380B-9
Note:
To insure the command has been accepted, the system software should check the status of DQ3 prior to and following each sub-
sequent sector erase command. If DQ3 were high on the second status check, the command may not have been accepted.
Figure 2. Embedded Erase Algorithm
18
Am29F400AT/Am29F400AB