MAX4924 データシートの表示（PDF） - Maxim Integrated

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MAX4924

Overvoltage Protectors with External pFET

Maxim Integrated 

Overvoltage Protectors with

External pFET

STANDBY

GATE = HIGH

FLAG = HIGH

VUVLO < VIN < VOVLO

VIN < VUVLO

TIME STARTS

COUNTING

t = 20ms

VIN > VOVLO

ON

GATE = LOW

FLAG = LOW

Figure 2. State Machine

Detailed Description

The MAX4923–MAX4926 overvoltage protection

controllers protect low-voltage systems against high-

voltage faults of up to +28V when used with a -30V

pFET. When the input voltage exceeds the OVLO

threshold, these devices turn off the external pFET to

prevent damage to protected components.

The typical overvoltage trip level is set to 7.18V

(MAX4923), 6.16V (MAX4924), 5.65V (MAX4925), and

4.46V (MAX4926). When the supply drops below the

UVLO threshold, the devices turn off the external pFET.

IN is ESD protected to +15kV (Human Body Model) when

bypassed with a 1µF ceramic capacitor to ground.

Undervoltage Lockout (UVLO)

The MAX4923–MAX4926 have a fixed 2.44V (typ)

UVLO level. When VIN is less than VUVLO, GATE is high

and FLAG is high.

Overvoltage Lockout (OVLO)

The MAX4923 has a 7.18V (typ) OVLO; the MAX4924

has a 6.16V (typ) OVLO; the MAX4925 has a 5.65V

(typ) OVLO; and the MAX4926 has a 4.46V (typ) OVLO.

When VIN is greater than VOVLO, GATE is high and

FLAG is high.

FLAG Output

The open-drain FLAG output is used to signal to the

host system that there is a fault with the input voltage.

FLAG goes high during an overvoltage or undervoltage

fault. Connect a pullup resistor from FLAG to the logic

I/O voltage of the host system.

ADAPTER WITH

BUILT-IN

BATTERY

CHARGER

INPUT

1

IN

P

OUTPUT

4

GATE

LITHIUM ION

BATTERY

SYSTEM

+ LOADS

-

VI0

MAX4926

2

GND

3

FLAG

Figure 3. MAX4926 Typical Operating Circuit

Device Operation

The MAX4923–MAX4926 have an on-board state

machine to control device operation. A flowchart is

shown in Figure 2. At initial power up, if VIN < VUVLO or

if VIN > VOVLO, both GATE and FLAG are high. When

VUVLO < VIN < VOVLO, an internal timer starts counting

and the device enters its on state after a 20ms delay. At

any time if VIN drops below VUVLO or above VOVLO,

both GATE and FLAG transition high.

Application Information

MAX4926 Application

In a typical application for the MAX4926, an external

adapter with built-in battery charger is connected to IN

and a battery is connected to the drain of the external

FET. When the adapter is unplugged, IN is directly con-

nected to the battery through the external FET. Since

the battery voltage is typically greater than VUVLO, the

GATE voltage stays low and the device remains pow-

ered by the battery.

MOSFET Selection

The MAX4923–MAX4926 are designed for use with

either a single pFET or dual pFETs in parallel.

MOSFETs with RDS(ON) specified for a VGS of -4.5V are

recommended. For input supplies near the UVLO maxi-

mum of 2.5V, use a MOSFET specified for a lower VGS

voltage. Also, the VDS must be -30V and the VGS (max)

must be higher than the VOVLO (max) for the MOSFET

to withstand the full +28V input range of the

MAX4923–MAX4926.

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