HD64336086 データシートの表示（PDF） - Renesas Electronics

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HD64336086

16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Renesas Electronics 

Item

Section 17 I2C Bus

Interface 2 (IIC2)

17.3.5 I2C Bus Status

Register (ICSR)

Page Revision (See Manual for Details)

320

Bit Bit Name Description

3 STOP [Setting Conditions]

• In master mode, when a stop condition is

detected after frame transfer

• In slave mode, when a stop condition is

detected after the general call address or the

first byte slave address, next to detection of

start condition, accords with the address set

in SAR

[Clearing Condition]

• When 0 is written in STOP after reading

STOP = 1

17.7 Usage Notes

343

Section 18 A/D Converter 348

18.3.1 A/D Data Registers

A to D (ADDRA to

ADDRD)

Section 20 Electrical

379

Characteristics

20.2.2 DC Characteristics

Table 20.2 DC

Characteristics (1)

Added

Therefore byte access to ADDR should be done by reading the

upper byte first then the lower one. Word access is also

possible. ADDR is initialized to H'0000.

Mode

Active mode 1

Active mode 2

Sleep mode 1

Sleep mode 2

RES Pin

VCC

VCC

Internal State

Operates

Operates

(φOSC/64)

Only timers operate

Only timers operate

(φOSC/64)

Rev. 2.00 Sep. 23, 2005 Page 467 of 354

REJ09B0160-0200

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