MT46V16M8TG-8 データシートの表示（PDF） - Micron Technology
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MT46V16M8TG-8 Datasheet PDF : 68 Pages
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NOTES (continued)
32. VDD must not vary more than 4% if CKE is not
active while any bank is active.
33. The clock is allowed up to ±150ps of jitter. Each
timing parameter is allowed to vary by the same
amount.
34. tHP min is the lesser of tCL minimum and tCH
minimum actually applied to the device CK and
CK/ inputs, collectively during bank active.
35. READs and WRITEs with auto precharge are not
allowed to be issued until tRAS(MIN) can be
satisfied prior to the internal precharge com-
mand being issued.
36. Any positive glitch must be less than 1/3 of the
clock and not more than +400mV or 2.9 volts,
whichever is less. Any negative glitch must be less
than 1/3 of the clock cycle and not exceed either
-300mV or 2.2 volts, whichever is more positive.
37. Normal Output Drive Curves:
a) The full variation in driver pull-down current
from minimum to maximum process, tem-
perature and voltage will lie within the outer
bounding lines of the V-I curve of Figure A.
b) The variation in driver pull-down current
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure A.
c) The full variation in driver pull-up current
from minimum to maximum process,
temperature and voltage will lie within the
outer bounding lines of the V-I curve of
Figure B.
d)The variation in driver pull-up current within
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within
the inner bounding lines of the V-I curve of
Figure B.
Figure A
Pull-Down Characteristics
160
140
120
100
80
60
40
20
0
0.0
0.5
1.0
1.5
2.0
2.5
VOUT (V)
PRELIMINARY
128Mb: x4, x8, x16
DDR SDRAM
e) The full variation in the ratio of the maximum
to minimum pull-up and pull-down current
should be between .71 and 1.4, for device
drain-to-source voltages from 0.1V to 1.0 Volt,
and at the same voltage and temperature.
f) The full variation in the ratio of the nominal
pull-up to pull-down current should be unity
±10%, for device drain-to-source voltages
from 0.1V to 1.0 Volt.
38. Reduced Output Drive Curves:
a) The full variation in driver pull-down current
from minimum to maximum process, tem-
perature and voltage will lie within the outer
bounding lines of the V-I curve of Figure C.
b) The variation in driver pull-down current
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure C.
c) The full variation in driver pull-up current
from minimum to maximum process, tempera-
ture and voltage will lie within the outer
bounding lines of the V-I curve of Figure D.
d)The variation in driver pull-up current within
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within
the inner bounding lines of the V-I curve of
Figure D.
e) The full variation in the ratio of the maximum
to minimum pull-up and pull-down current
should be between .71 and 1.4, for device
drain-to-source voltages from 0.1V to 1.0 V,
and at the same voltage.
f) The full variation in the ratio of the nominal
pull-up to pull-down current should be unity
±10%, for device drain-to-source voltages
from 0.1V to 1.0 V.
Figure B
Pull-Up Characteristics
0
-20
-40
-60
-80
-100
-120
-140
-160
-180
-200
0.0
0.5
1.0
1.5
2.0
2.5
VDDQ - VOUT (V)
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
52
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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