NXP Semiconductors
74LVC169
Presettable synchronous 4-bit up/down binary counter
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13.
Symbol Parameter
Conditions
40 C to +85 C
Min Typ[1] Max
tpd
propagation delay CP to Qn; see Figure 8
VCC = 1.2 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
CP to TC; see Figure 8
[2]
-
1.5
2.4
1.5
1.5
[2]
17
-
7.1 13.1
4.1 7.4
3.9 7.2
3.7 6.6
VCC = 1.2 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
CET to TC; see Figure 9
-
2.0
3.0
1.5
1.5
[2]
21
-
8.5 14.9
4.9 8.4
4.7 8.8
4.4 7.5
VCC = 1.2 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
U/D to TC; see Figure 10
-
1.5
2.2
1.5
1.5
[2]
19
-
6.6 12.3
3.8 7.0
4.0 7.2
3.4 6.2
tW
pulse width
VCC = 1.2 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
CP HIGH or LOW; see Figure 8
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
-
21
-
1.0 7.3 13.7
1.7 4.2 7.7
1.5 4.4 8.2
1.5 3.8 6.9
6.0
-
-
5.0
-
-
5.0
-
-
4.0 1.2
-
40 C to +125 C Unit
Min
Max
-
- ns
1.5
15.1 ns
2.4
8.6 ns
1.5
9.0 ns
1.5
10.0 ns
-
- ns
2.0
17.2 ns
3.0
9.7 ns
1.5
11.0 ns
1.5
9.5 ns
-
- ns
1.5
14.2 ns
2.2
8.1 ns
1.5
9.0 ns
1.5
8.0 ns
-
- ns
1.0
15.8 ns
1.7
8.9 ns
1.5
10.5 ns
1.5
9.0 ns
6.0
- ns
5.0
- ns
5.0
- ns
4.0
- ns
74LVC169
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 29 November 2012
© NXP B.V. 2012. All rights reserved.
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