NXP Semiconductors
74LVC169
Presettable synchronous 4-bit up/down binary counter
6. Functional description
Table 3. Function table[1]
Operating mode
Input
CP
U/D
CEP
CET
PE
Dn
Parallel load (Dn to Qn)
X
X
X
I
I
X
X
X
l
h
Count up (increment)
h
I
I
h
X
Count down (decrement)
I
I
I
h
X
Hold (do nothing)
X
h
X
h
X
X
X
X
h
X
[1] H = HIGH voltage level steady state
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition
L = LOW voltage level steady state
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition
qn = Lower case letters indicate state of referenced output prior to the LOW-to-HIGH clock transition
X = don’t care
= LOW-to-HIGH clock transition
* = The TC is LOW when CET is LOW and the counter is at terminal count
Terminal count up is (HHHH) and terminal count down is (LLLL)
Output
Qn
TC
L
*
H
*
count up
*
count down *
qn
*
qn
H
Fig 6. State diagram
0
1
2
15
14
13
12 11 10
count down
count up
3
4
5
6
7
9
8
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74LVC169
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 29 November 2012
© NXP B.V. 2012. All rights reserved.
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