A25L40PUQ-50F データシートの表示（PDF） - AMIC Technology

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A25L40PUQ-50F

4 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface

AMIC Technology 

Figure 1. Bus Master and Memory Devices on the SPI Bus

SPI Interface with

(CPOL, CPHA)

= (0, 0) or (1, 1)

SDO

SDI

SCK

Bus Master

(ST6, ST7, ST9,

ST10, Other)

CS3 CS2 CS1

CQD

SPI Memory

Device

S W HOLD

CQD

SPI Memory

Device

S W HOLD

A25L40P Series

CQD

SPI Memory

Device

S W HOLD

Note: The Write Protect ( W ) and Hold ( HOLD ) signals should be driven, High or Low as appropriate.

Figure 2. SPI Modes Supported

CPOL CPHA

0

0

C

1

1

C

D

Q

MSB

MSB

PRELIMINARY (May, 2007, Version 0.4)

4

AMIC Technology Corp.

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