AD1888JCP データシートの表示（PDF） - Analog Devices

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AD1888JCP

AC ’97 SoundMAX® Codec

Analog Devices 

tRST_LOW

tRST2CLK

RESET

BIT_CLK

SDATA_IN

tTRI2ACTV

tTRI2ACTV

Figure 1. Cold Reset Timing (Codec is Supplying the Bit_CLK Signal)

SYNC

BIT_CLK

tSYNC_HIGH

tSYNC2CLK

Figure 2. Warm Reset Timing

AD1888

BIT_CLK

SYNC

tCLK_LOW

tCLK_HIGH

tCLK_PERIOD

tSYNC_LOW

tSYNC_HIGH

tSYNC_PERIOD

Figure 3. Clock Timing

BIT_CLK

tRISECLK

tFALLCLK

SYNC

tRISESYNC

tFALLSYNC

SDATA_IN

tRISEDIN

tFALLDIN

SDATA_OUT

tRISEDOUT

tFALLDOUT

Figure 4. Signal Rise and Fall Times

SLOT 1

SYNC

SLOT 2

BIT_CLK

WRITE TO

SDATA_OUT 0x26

DATA

PR4

SDATA_IN

tS2_PDOWN

BIT_CLK NOT TO SCALE

Figure 5. AC-Link Low Power Mode Timing

tCO

BIT_CLK

VIH

tSETUP

VIL

SDATA_OUT

SDATA_IN

SYNC

VOH

VOL

tHOLD

Figure 6. AC-Link Low Power Mode Timing

RESET

SDATA_OUT

SDATA_IN, BIT_CLK,

EAPD, SPDIF_OUT

AND DIGITAL I/O

tSETUP2RST

tOFF

Hi-Z

Figure 7. ATE Test Mode

REV. 0

–5–

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