Data Sheet
AD5750/AD5750-1/AD5750-2
FUNCTIONAL BLOCK DIAGRAM
DVCC GND AVDD GND COMP1 COMP2
CLEAR
CLRSEL
SCLK/OUTEN*
SDIN/R0*
SYNC/RSET*
SDO/VFAULT *
HW SELECT
INPUT SHIFT
REGISTER
AND
CONTROL
LOGIC
STATUS
REGISTER
AD5750/AD5750-1/AD5750-2
VSENSE+
VOUT RANGE
SCALING
VOUT
SHORT FAULT
VOUT
VSENSE–
VIN
VREF
R2
VDD
R3
RESET
IOUT RANGE
SCALING
RSET
Vx**
REXT1
REXT2
IOUT
FAULT/ TEMP*
NC/IFAULT *
OVERTEMP
VOUT SHORT FAULT
IOUT OPEN FAULT
POWER-
ON RESET
VSS
IOUT
OPEN FAULT
AD2/R1* AD1/R2* AD0/R3*
AVSS
* DENOTES SHARED PIN. SOFTWARE MODE DENOTED BY REGULAR TEXT, HARDWARE MODE
DENOTED BY ITALIC TEXT. FOR EXAMPLE, FOR FAULT/ TEMP PIN, IN SOFTWARE MODE, THIS
PIN TAKES ON FAULT FUNCTION. IN HARDWARE MODE, THIS PIN TAKES ON TEMP FUNCTION.
** Vx IS AN INTERNAL BIAS VOLTAGE (CAN BE GROUND OR OTHER VOLTAGE) THAT IS USED
TO GENERATE THE INTERNAL SENSE CURRENTS NEEDED FOR THE CURRENT OUTPUTS.
Figure 1.
Rev. F | Page 3 of 36