AD7148 データシートの表示（PDF） - Analog Devices
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AD7148 Datasheet PDF : 56 Pages
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Data Sheet
SPECIFICATIONS
VCC = 2.6 V to 3.6 V, TA = −40oC to +85°C, unless otherwise noted.
Table 1.
Parameter
CAPACITANCE-TO-DIGITAL CONVERTER
Update Rate
Min
24.25
Typ Max
25
25.75
Resolution
CINx Input Range
No Missing Codes
Total Unadjusted Error
Output Noise (Peak-to-Peak)
Output Noise (RMS)
CSTRAY Offset Range
CSTRAY Offset Resolution
Low Power Mode Delay Accuracy
EXCITATION SOURCE
Frequency
Output Voltage
ACSHIELD
Short-Circuit Source Current
Short-Circuit Sink Current
Maximum Output Load
LOGIC INPUTS (SCLK, SDA,)
Input High Voltage, VIH
Input Low Voltage, VIL
Input High Voltage, IIH
Input Low Voltage, IIL
Hysteresis
OPEN-DRAIN OUTPUTS (SCLK, SDA, INTE)
Output Low Voltage, VOL
Output High Leakage Current, IOH
POWER
VCC
VDRIVE
ICC
16
±8
16
±20
7
3
0.8
0.5
±20
0.32
4
250
0
VCC
10
10
150
0.7 × VDRIVE
0.4
−1
1
150
0.4
+0.1 ±1
2.6
3.3
3.6
1.65
3.6
0.9
1
15.5 21.5
2.3
7.5
AD7148
Unit Test Conditions/Comments
ms
Bits
pF
Bits
%
Codes
Codes
Codes
Codes
pF
pF
%
8 conversion stages in sequencer;
decimation rate = 256
Guaranteed by design, not production tested
Decimation rate = 128
Decimation rate = 256
Decimation rate = 128
Decimation rate = 256
6-bit DAC
% of 200 ms, 400 ms, 600 ms, or 800 ms
kHz
V
Oscillating
mA
mA
pF
Capacitance load on ACSHIELD to ground
V
V
μA
VIN = VDRIVE
μA
VIN = GND
mV
V
ISINK = −1 mA
μA
VOUT = VDRIVE
V
V
Serial interface operating voltage
mA
In full power mode, VCC + VDRIVE
μA
Low power mode, converter idle, VCC + VDRIVE
μA
Full shutdown, VCC + VDRIVE
Rev. B | Page 3 of 56
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