AD7392/AD7393
2µs
VOUT
(5mV/DIV)
AD7392
CS
(5V/DIV)
20mV
VDD = 5V
VREF = 2.5V
fCLK = 50kHz
CODE: 0x7F TO 0x80
TIME (2µs/DIV)
Figure 17. Midscale Transition Performance
5µs
VOUT
(5mV/DIV)
VDD = 5V
VREF = 2.5V
CS = HIGH
5mV
D0 TO D11
(5V/DIV)
TIME (5µs/DIV)
Figure 18. Digital Feedthrough
100µs
AD7392
VOUT
(1V/DIV)
CS
(5V/DIV)
VDD = 5V
VREF = 2.5V
1V
TIME (100µs/DIV)
Figure 19. Large Signal Settling Time
5
0
–5
VDD = 5V
–10
VREF = 100mV + 2VDC
DATA = 0xFFF
–15
–20
–25
–30
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 20. Reference Multiplying Bandwidth
2.0
AD7392
1.8
VDD = 5V
CODE = 0x768
1.6
TA = 25°C
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
1
2
3
4
5
REFERENCE VOLTAGE (V)
Figure 21. Integral Nonlinearity Error vs. Reference Voltage
1.2
AD7392
SAMPLE SIZE = 50
1.0
0.8
CODE = 0xFFF
0.6
0.4
CODE = 0x000
0.2
0
0
100
200
300
400
500
600
HOURS OF OPERATION AT 150°C
Figure 22. Long-Term Drift Accelerated by Burn-In
Rev. C | Page 10 of 20