AD7843ARQ データシートの表示（PDF） - Analog Devices

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AD7843ARQ

Touch Screen Digitizer

Analog Devices 

POWER VS. THROUGHPUT RATE

By using the power-down options on the AD7843 when not

converting, the average power consumption of the device

decreases at lower throughput rates. Figure 23 shows how, as the

throughput rate is reduced while maintaining the DCLK

frequency at 2 MHz, the device remains in its power-down state

longer and the average current consumption over time drops

accordingly.

For example, if the AD7843 is operated in a 24 DCLK

continuous sampling mode, with a throughput rate of 10 kSPS

and a SCLK of 2 MHz, and the device is placed in the power-

down mode between conversions, (PD0, PD1 = 0, 0), the current

consumption is calculated as follows. The power dissipation

during normal operation is typically 210 µA (VCC = 2.7 V). The

power-up time of the ADC is instantaneous, so when the part is

converting, it consumes 210 µA. In this mode of operation, the

part powers up on the fourth falling edge of DCLK after the

start bit is recognized. It goes back into power-down at the end

of conversion on the 20th falling edge of DCLK. This means the

part consumes 210 µA for 16 DCLK cycles only, 8 µs, during

each conversion cycle. With a throughput rate of 10 kSPS, the

cycle time is 100 µs and the average power dissipated during

each cycle is (8/100) × (210 µA) = 16.8 µA.

AD7843

1000

100

fDCLK = 16 × fSAMPLE

fDCLK = 2MHz

10

VCC = 2.7V

TA = –40°C TO +95°C

1

0

20

40

60

80

100

120

THROUGHPUT (kSPS)

Figure 23. Supply Current vs. Throughput (µA)

Table 7. Power Management Options

PD1 PD0 PENIRQ Description

0 0 Enabled This configuration results in power-down of the device between conversions. The AD7843 only powers down

between conversions. Once PD1 and PD0 are set to 0, 0, the conversion is performed first, and the AD7843

powers down upon completion of that conversion. At the start of the next conversion, the ADC instantly powers

up to full power. This means there is no need for additional delays to ensure full operation, and the very first

conversion is valid. The Y− switch is on while in power-down.

0 1 Disabled This configuration results in the same behavior as when PD1 and PD0 have been programmed with 0, 0, except

that PENIRQ is disabled. The Y− switch is off while in power-down.

1 0 Enabled This configuration results in keeping the AD7843 permanently powered up with PENIRQ enabled.

1 1 Disabled This configuration results in keeping the AD7843 always powered up with PENIRQ disabled.

Rev. B | Page 15 of 20

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