AD9508(RevA) データシートの表示（PDF） - Analog Devices

部品番号

コンポーネント説明

メーカー

AD9508
(Rev.:RevA)

1.65 GHz Clock Fanout Buffer with Output Dividers and Delay Adjust

Analog Devices 

AD9508

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics ............................................................. 3

Power Supply Current and Temperature Conditions .............. 3

Clock Inputs and Output DC Specifications ............................ 4

Output Driver Timing Characteristics ...................................... 5

Logic Inputs................................................................................... 6

Serial Port Specifications—SPI Mode........................................ 6

Serial Port Specifications—I2C Mode ........................................ 7

External Resistor Values For Pin Strapping Mode ................... 8

Clock Output Additive Phase Noise .......................................... 8

Clock Output Additive Time Jitter............................................. 9

Absolute Maximum Ratings ..................................................... 10

Thermal Characteristics ............................................................ 10

ESD Caution................................................................................ 10

Pin Configuration and Function Descriptions........................... 11

Typical Performance Characteristics ........................................... 13

Test Circuits..................................................................................... 19

Input/Output Termination Recommendations ...................... 19

Terminology .................................................................................... 20

Theory of Operation ...................................................................... 21

Detailed Block Diagram ............................................................ 21

REVISION HISTORY

4/13—Rev. 0 to Rev. A

Changes to Table 9............................................................................ 9

Changes to Figure 10...................................................................... 14

Changes to Figure 15...................................................................... 15

Changes to Figure 24 and Figure 26............................................. 16

Changes to Figure 27, Figure 29 to Figure 32 ............................. 17

Changes to Figure 33...................................................................... 18

1/13—Revision 0: Initial Version

Data Sheet

Programming Mode Selection.................................................. 21

Clock Input.................................................................................. 21

Clock Dividers ............................................................................ 23

Phase Delay Control .................................................................. 23

Reset Modes ................................................................................ 23

Power-Down Mode .................................................................... 23

Output Clock Synchronization................................................. 24

Power Supply............................................................................... 24

Thermally Enhanced Package Mounting Guidelines ............ 24

Pin Strapping to Program Upon Power-Up ................................ 25

Serial Control Port ......................................................................... 26

SPI/I²C Port Selection................................................................ 26

SPI Serial Port Operation .......................................................... 26

I2C Serial Port Operation .......................................................... 29

Register Map ................................................................................... 32

Register Map Bit Descriptions ...................................................... 33

Serial Port Configuration (Register 0x00) .............................. 33

Silicon Revision (Register 0x0A to Register 0x0D) ............... 33

Chip Level Functions (Register 0x12 to Register 0x14) ........ 33

OUT0 Functions (Register 0x15 to Register 0x1A)............... 34

OUT1 Functions (Register 0x1B to Register 0x20) ............... 35

OUT2 Functions (Register 0x21 to Register 0x26)................ 36

OUT3 Functions (Register 0x27 to Register 0x2C)............... 37

Packaging and Ordering Information ......................................... 38

Outline Dimensions ................................................................... 38

Ordering Guide .......................................................................... 38

Rev. A | Page 2 of 40

Share Link: