AD9508 データシートの表示（PDF） - Analog Devices
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AD9508 Datasheet PDF : 40 Pages
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AD9508
CLOCK OUTPUT ADDITIVE TIME JITTER
Table 9.
Parameter
LVDS OUTPUT ADDITIVE TIME JITTER
CLK = 622.08 MHz, Outputs = 622.08 MHz
CLK = 622.08 MHz, Outputs = 155.52 MHz
CLK = 125 MHz, Outputs = 125 MHz
CLK = 400 MHz, Outputs = 50 MHz
HSTL OUTPUT ADDITIVE TIME JITTER
CLK = 622.08 MHz, Outputs = 622.08 MHz
CLK = 622.08 MHz, Outputs = 155.52 MHz
CMOS OUTPUT ADDITIVE TIME JITTER
CLK = 100 MHz, Outputs = 100 MHz
Data Sheet
Min Typ Max Unit Test Conditions/Comments
41
fs rms BW = 12 kHz to 20 MHz
70
fs rms BW = 20 kHz to 80 MHz
69
fs rms BW = 50 kHz to 80 MHz
93
fs rms BW = 12 kHz to 20 MHz
144
fs rms BW = 20 kHz to 80 MHz
142
fs rms BW = 50 kHz to 80 MHz
105
fs rms BW = 12 kHz to 20 MHz
209
fs rms BW = 20 kHz to 80 MHz
206
fs rms BW = 50 kHz to 80 MHz
184
fs rms BW = 12 kHz to 20 MHz
41
fs rms BW = 12 kHz to 20 MHz
56
fs rms BW = 100 Hz to 20 MHz
72
fs rms BW = 20 kHz to 80 MHz
70
fs rms BW = 50 kHz to 80 MHz
76
fs rms BW = 12 kHz to 20 MHz
87
fs rms BW = 100 Hz to 20 MHz
158
fs rms BW = 20 kHz to 80 MHz
156
fs rms BW = 50 kHz to 80 MHz
91
fs rms BW = 12 kHz to 20 MHz
Rev. G | Page 10 of 40
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