DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ADL5565-EVALZ(Rev0) データシートの表示(PDF) - Analog Devices

部品番号
コンポーネント説明
メーカー
ADL5565-EVALZ
(Rev.:Rev0)
ADI
Analog Devices 
ADL5565-EVALZ Datasheet PDF : 28 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
ADL5565
ADC INTERFACING
The ADL5565 is a high output linearity amplifier that is optimized
for ADC interfacing. There are several options available to the
designer when using the ADL5565. Figure 40 uses a wideband
1:1 transmission line balun followed by two 40 Ω resistors in
parallel with the three input impedances (which change with
the gain selection of the ADL5565) to provide a 50 Ω differential
impedance and provides a wideband match to a 50 Ω source.
The ADL5565 is ac-coupled from the AD9467 to avoid common-
mode dc loading. The 33 Ω resistors improve the isolation between
the ADL5565 and any switching currents present at the analog-
to-digital, sample-and-hold circuitry. The AD9467 input presents a
530 Ω differential load impedance and requires a 2 V to 2.5 V
differential input swing to reach full scale (VREF = 1 V to 1.25 V).
This circuit provides variable gain, isolation, and source
matching for the AD9467.
Applying a full-scale, single-tone signal from the ADL5565, an
SFDR of 89.2 dBc is realized (see Figure 37). Applying two half-
scale signals from the ADL5565 in a gain of 6 dB, an SFDR of
87.5 dBc is achieved at 100 MHz (see Figure 38). The bandwidth
of the circuit in Figure 40 is shown in Figure 39.
0
GAIN = 6dB
–15
SNR = 69.44dBc
SFDR = 89.2dBc
SECOND = –85.1dBc
–30 THIRD = –89.3dBc
NOISE FLOOR = –115.7dB
–45
–60
–75
–90
–105
2
+
4
6
5
3
–120
–135
–150
0
15 30 45 60 75 90 105 120
FREQUENCY (MHz)
Figure 37. Measured Single-Tone Performance of the
Circuit in Figure 40 for a 100 MHz Input Signal
0
FUNDAMENTAL1 = –7.078dBFS
–15
FUNDAMENTAL2 = –7.169dBFS
IMD (2f1 – f2) = –88.237dBc
IMD (2f2 + f1) = –91.37dBc
–30 NOISE FLOOR = –115.96dB
–45
–60
–75
–90
–105 F2 – F1
–120
F1 – F2
2F2 – 2F1
2F1 – 2F2
2F1 – F2
2F2 – F1
–135
–150
0
15 30 45 60 75 90 105 120
FREQUENCY (MHz)
Figure 38. Measured Two-Tone Performance of the Circuit in Figure 40 for a
100 MHz Input Signal
0
1
2
3
4
5
0
100
200
300
400
500
FREQUENCY (MHz)
Figure 39. Measured Frequency Response of the Wideband
ADC Interface Depicted in Figure 40
The wideband frequency response is an advantage in broad-
band applications, such as predistortion receiver designs and
instrumentation applications. However, by designing for a wide
analog input frequency range, the cascaded SNR performance is
somewhat degraded due to high frequency noise aliasing into
the wanted Nyquist zone.
50
AC
ETC1-1-13
40
40
0.1µF A
0.1µF B
VIP2
VIP1
VOP
VIN1 ADL5565
VIN2
VON
0.1µF
0.1µF
33
VIN+
AD9467
16
16-BIT ADC
33
VIN–
Figure 40. Wideband ADC Interfacing Example Featuring the AD9467
Rev. 0 | Page 20 of 28

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]