ADUM5403WCRWZ データシートの表示（PDF） - Analog Devices

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ADUM5403WCRWZ

Quad-Channel Isolators with Integrated DC-to-DC Converter

Analog Devices 

Data Sheet

ADuM5401W/ADuM5402W/ADuM5403W

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

Typical specifications are at TA = 25°C, VDD1 = 5.0 V, VISO = 3.3 V, VSEL = GNDISO. Minimum/maximum specifications apply over the

entire recommended operation range, which is 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VISO ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise

noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.

Table 10. DC-to-DC Converter Static Specifications

Parameter

Symbol

Min

Typ

DC-TO-DC CONVERTER SUPPLY

Setpoint

VISO

3.0

3.3

Line Regulation

VISO (LINE)

1

Load Regulation

VISO (LOAD)

1

Output Ripple

VISO (RIP)

50

Output Noise

Switching Frequency

PWM Frequency

Output Supply Current

Efficiency at IISO (MAX)

IDD1, No VISO Load

IDD1, Full VISO Load

VISO (NOISE)

130

fOSC

180

fPWM

625

IISO (MAX)

100

30

IDD1 (Q)

14

IDD1 (MAX)

230

Max

3.6

5

22

Unit

Test Conditions/Comments

V

mV/V

%

mV p-p

mV p-p

MHz

kHz

mA

%

mA

mA

IISO = 0 mA

IISO = 50 mA, VDD1 = 3.0 V to 3.6 V

IISO = 6 mA to 54 mA

20 MHz bandwidth, CBO = 0.1 µF||10 µF,

IISO = 90 mA

CBO = 0.1 µF||10 µF, IISO = 90 mA

VISO > 3 V

IISO = 90 mA

Table 11. DC-to-DC Converter Dynamic Specifications

25 Mbps—C Grade

Parameter

Symbol

Min Typ

Max

SUPPLY CURRENT

Input

IDD1

ADuM5401W

44

ADuM5402W

45

ADuM5403W

46

Available to Load

IISO (LOAD)

ADuM5401W

92

ADuM5402W

91

ADuM5403W

89

Unit

Test Conditions/Comments

mA

No VISO load

mA

No VISO load

mA

No VISO load

mA

mA

mA

Table 12. Switching Specifications

Parameter

Symbol

Min Typ

Max

SWITCHING SPECIFICATIONS

Data Rate

25

Propagation Delay

tPHL, tPLH

45

60

Pulse Width Distortion

PWD

6

Change vs. Temperature

5

Pulse Width

PW

40

Propagation Delay Skew

tPSK

15

Channel Matching

Codirectional1

tPSKCD

6

Opposing Directional2

tPSKOD

15

Unit

Mbps

ns

ns

ps/°C

ns

ns

ns

ns

Test Conditions/Comments

Within PWD limit

50% input to 50% output

|tPLH − tPHL|

Within PWD limit

Between any two units

1 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

2 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the

isolation barrier.

Rev. D | Page 7 of 24

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