IS61LPS25636D データシートの表示（PDF） - Integrated Silicon Solution

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IS61LPS25636D

256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, SINGLE-CYCLE DESELECT STATIC RAM

Integrated Silicon Solution 

IS61SPS25632T/D IS61LPS25632T/D

IS61SPS25636T/D IS61LPS25636T/D

IS61SPS51218T/D IS61LPS51218T/D

ISSI ®

BLOCK DIAGRAM

CLK

ADV

ADSC

ADSP

A18-A0

(61SPS51218,

61LPS51218)

A17-A0

(61SPS25632/36,

61LPS25632/36)

18/19

MODE

CLK

Q0 A0

A0'

BINARY

COUNTER

CE

Q1 A1

A1'

CLR

D

Q

ADDRESS

REGISTER

CE

CLK

16/17

256Kx32; 256Kx36;

512Kx18

MEMORY ARRAY

18/19

32, 36,

or 18

32, 36,

or 18

GW

BWE

BWd

(x32/x36)

BWc

(x32/x36)

BWb

(x32/x36/x18)

BWa

(x32/x36/x18)

(T, D) CE

(T, D) CE2

(T) CE2

D DQd Q

BYTE WRITE

REGISTERS

CLK

D DQc Q

BYTE WRITE

REGISTERS

CLK

D DQb Q

BYTE WRITE

REGISTERS

CLK

D DQa Q

BYTE WRITE

REGISTERS

CLK

D

Q

ENABLE

REGISTER

CE

CLK

4

INPUT

REGISTERS

CLK

OUTPUT

REGISTERS

CLK

32, 36,

or 18

DQa - DQd

OE

D

Q

ENABLE

DELAY

REGISTER

CLK

OE

2

Integrated Silicon Solution, Inc. — 1-800-379-4774

PRELIMINARY INFORMATION Rev. 00B

05/09/01

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