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AOZ1038 データシートの表示(PDF) - Alpha and Omega Semiconductor

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AOZ1038
AOSMD
Alpha and Omega Semiconductor 
AOZ1038 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AOZ1038
Ordering Information
Part Number
AOZ1038DI
AOZ1038PI
Ambient Temperature Range
-40 °C to +85 °C
Package
5x6 DFN-8
Exposed Pad SO-8
Environmental
Green Product
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
PGND 1
VIN 2
AGND 3
FB 4
PAD
(LX)
8 NC
7 NC
6 EN
5 COMP
5x6 DFN-8
(Top View)
PGND 1
VIN 2
AGND 3
FB 4
PAD
(LX)
8 NC
7 NC
6 EN
5 COMP
Exposed Pad SO-8
(Top View)
Pin Description
Pin Number
5x6 DFN-8
Exposed
Pad SO-8
1
1
2
2
3
3
4
4
5
5
6
6
7, 8
7, 8
Exposed Pad Exposed Pad
Pin Name
PGND
VIN
AGND
FB
COMP
EN
NC
LX
Pin Function
Power ground. PGND needs to be electrically connected to AGND.
Supply voltage input. When VIN rises above the UVLO threshold and EN
is logic high, the device starts up.
Analog ground. AGND is the reference point for controller section. AGND
needs to be electrically connected to PGND.
Feedback input. The FB pin is used to set the output voltage via a resistive
voltage divider between the output and AGND.
External loop compensation pin. Connect a RC network between COMP
and AGND to compensate the control loop.
Enable pin. Pull EN to logic high to enable the device. Pull EN to logic low
to disable the device. If on/off control is not needed, connect it to VIN and
do not leave it open.
No Connect pin. Pin 7 and 8 are not internally connected. Connect these
two pins externally to LX and use them for better thermal performance.
Switching node. LX is the drain of the internal PFET. LX is used as the
thermal pad of the power stage.
Rev. 1.2 February 2011
www.aosmd.com
Page 2 of 14

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