APL5332
R eliab ility test p rog ram
Test item
SO LD ER A BILITY
H O LT
PCT
TST
ESD
Latch-U p
M ethod
M IL-S T D -883D -2003
M IL-S T D -883D -1005.7
JESD-22-B, A102
M IL -S T D -8 83 D -1 0 11 .9
M IL-S T D -883D -3015.7
JESD 78
Carrier Tape
Po
P
E
P1
D escription
245°C , 5 SEC
1000 H rs Bias @ 125 °C
168 Hrs, 100 % RH , 121°C
-6 5°C ~ 1 5 0°C , 20 0 C yc le s
V H B M > 2K V, V M M > 200V
10m s , Itr > 1 00m A
t
D
F
Bo
W
Ko
Ao
D1
T2
J
C
A
B
T1
Copyright ANPEC Electronics Corp.
16
Rev. A.3 - Oct., 2003
www.anpec.com.tw