LTC1289C データシートの表示（PDF） - Linear Technology
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LTC1289C Datasheet PDF : 28 Pages
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LTC1289
AC CHARACTERISTICS (Note 3)
SYMBOL
fSCLK
fACLK
tACC
PARAMETER
Shift Clock Frequency
A/D Clock Frequency
Delay time from CS↓ to DOUT Data Valid
tSMPL
Analog Input Sample Time
tCONV
Conversion Time
tCYC
Total Cycle Time
tdDO
tdis
ten
thCS
thDI
thDO
tf
tr
tsuDI
tsuCS
tWHCS
Delay Time, SCLK↓ to DOUT Data Valid
Delay Time, CS↑ to DOUT Hi-Z
Delay Time, 2nd ACLK↓ to DOUT Enabled
Hold Time, CS After Last SCLK↓
Hold Time, DIN After SCLK↑
Time Output Data Remains Valid After SCLK↓
DOUT Fall Time
DOUT Rise Time
Setup Time, DIN Stable Before SCLK↑
Setup Time, CS↓ Before Clocking in
First Address Bit
CS High Time During Conversion
CIN
Input Capacitance
CONDITIONS
(Note 6)
(Note 6)
(Note 9)
See Operating Sequence
See Operating Sequence
See Operating Sequence (Note 6)
See Test Circuits
q
See Test Circuits
q
See Test Circuits
q
(Note 6)
(Note 6)
See Test Circuits
q
See Test Circuits
q
(Note 6 and 9)
(Note 6 and 9)
(Note 6)
Analog Inputs On Channel
Analog Inputs Off Channel
Digital Inputs
LTC1289B
LTC1289C
MIN TYP MAX
0
1.0
(Note 10)
2.0
2
7
52
12 SCLK +
56 ACLK
200 350
70 150
130 250
0
50
50
40 100
40 100
50
2 ACLK Cycles
+ 180ns
52
100
5
5
UNITS
MHz
MHz
ACLK
Cycles
SCLK
Cycles
ACLK
Cycles
Cycles
ns
ns
ns
ns
ns
ns
ns
ns
ns
ACLK
Cycles
pF
pF
pF
3
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