AT34C02
WP Connected to GND or Floating
Start R/W Bit Write Protect Register
1010
R
X
1010
W
Programmed
1010
W
Not Programmed
0110
R
Programmed
0110
R
Not Programmed
0110
W
Programmed
0110
W
Not Programmed
WP Connected to VCC
1010
R
X
1010
W
Programmed
1010
W
Not Programmed
0110
R
Programmed
0110
R
Not Programmed
0110
W
Programmed
0110
W
Not Programmed
Acknowledgment
from Device
ACK
ACK
ACK
No ACK
ACK
No ACK
ACK
ACK
ACK
ACK
No ACK
ACK
No ACK
ACK
Action from Device
Read Array
Can Write to Second Half (80H - FFH) Only
Can Write to Full Array
Stop - Indicates Write Protect Register is Programmed
Read Out Data Don’t Care. Indicates WP Register is Not Prog
Stop - Indicates Write Protect Register is Programmed
Program Write Protect Register (irreversible)
Read Array
Device Write Protect
Device Write Protect
Stop - Indicates Write Protect Register is Programmed
Read Out Data Don’t Care. Indicates WP Register is Not Prog
Stop - Indicates Write Protect Register is Programmed
Cannot Program Write Protect Register
Figure 7. Setting Write Protect Register
SDA LINE
S
T
CONTROL
A
BYTE
R
T
WORD
ADDRESS
S
DATA
T
O
P
0110
0
A
A
A
C
C
C
K
K
K
= Don't Care
Read Operations
Read operations are initiated the same way as write operations with the exception that
the read/write select bit in the device address word is set to one. There are three read
operations: current address read, random address read and sequential read.
CURRENT ADDRESS READ: The internal data word address counter maintains the
last address accessed during the last read or write operation, incremented by one. This
address stays valid between operations as long as the chip power is maintained. The
address “roll over” during read is from the last byte of the last memory page to the first
byte of the first page.
Once the device address with the read/write select bit set to one is clocked in and
acknowledged by the EEPROM, the current address data word is serially clocked out.
To end the command, the microcontroller does not respond with an input zero but does
generate a following stop condition (see Figure 11 on page 13).
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the
data word address. Once the device address word and data word address are clocked
11
0958Q–SEEPR–1/07