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CMX878 データシートの表示(PDF) - CML Microsystems Plc

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CMX878
CML
CML Microsystems Plc 
CMX878 Datasheet PDF : 61 Pages
First Prev 51 52 53 54 55 56 57 58 59 60
Line Powered Modem plus DAA
CMX878
1.7.1.3 Operating Characteristics
For the following conditions unless otherwise specified:
AVDD = 3.3V. Circuit as in Figure 4a. Line Voltage = 50V DC.
CMX878 operational temp. range = -40 to +85°C.
Xtal Frequency = 11.0592 or 12.288MHz ± 0.01% (100ppm). 0dBm corresponds to 775mVrms.
DC Parameters
Regulated Supply at AVDD (regulator on)
Standby Supply at SBYVDD (regulator off)
Notes
1a
1a, 1b
Min.
3.1
2.9
Typ.
3.3
3.4
Max.
3.5
3.9
Units
V
V
On-hook Supply Current from Line (regulator off) 1a
-
Regulated Supply Current from Line (regulator
1a
-
on, all other functions powersaved, no other load)
6.7
10
µA
1.0
1.4
mA
Currents into the device via
IDD = AVDD + DVDD currents
with regulator running at 3.3V :
IDD (MODEM Powersaved, i.e. ‘Pwr’ bit =0)
IDD (MODEM Reset but not powersaved)
IDD (MODEM Running)
IDD (DAC and ADC only running)
1c, 2
-
1c, 3
-
1c
-
1c
-
100
130
µA
2.0
3.0
mA
3.5
5.5
mA
1.0
2.0
mA
Logic '1' Input Level
Logic '0' Input Level
Logic Input Leakage Current (Vin = 0 to VDD),
(excluding XTAL/CLOCK input)
Output Logic '1' Level (lOH = 2 mA)
Output Logic '0' Level (lOL = -3 mA)
IRQN O/P 'Off' State Current (Vout = VDD)
RD and RT pin Schmitt trigger input high-going
threshold (Vthi) (see Figure 13)
RD and RT pin Schmitt trigger input low-going
threshold (Vtlo) (see Figure 13)
4
70%
-
-
DVDD
4
-
-
30% DVDD
-1.0
-
+1.0
µA
80%
-
-
-
-
DVDD
0.4
V
-
-
1.0
µA
0.56 x
-
0.56 x
V
SBYVDD
SBYVDD
+ 0.6V
0.44 x
-
0.44 x
V
SBYVDD
- 0.6V
SBYVDD
Notes:
1a. With the application circuit at Tamb = 0 to 40°C.
1b. With the regulator on and the gyrator on (line off-hook) the minimum value for SBYVDD
will be AVDD – D6 diode drop.
1c. At 25°C, not including any current drawn from the CMX878 pins by external circuitry
other than X1, C1 and C2. ‘MODEM’ means the MODEM & TONES PROCESSOR
block.
2. All logic inputs at VSS except for RT and CSN inputs which are at VDD.
3. General Mode Register b8 and b7 both set to 1.
4. Excluding RD, RT and WAKE pins.
© 2002 Consumer Microcircuits Limited
53
D/878/2

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