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CXA1166K データシートの表示(PDF) - Sony Semiconductor

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CXA1166K
Sony
Sony Semiconductor 
CXA1166K Datasheet PDF : 28 Pages
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CXA1166K
4) D/A Full Scale (VR4)
The volume to adjust the bottom of D/A output full scale voltage (–1V typ.)
5) SW1 and SW2
Selection switches to adjust the clock delay. These switches enable clock delay to be stepped to any one of
128 settings (binary code of “0000000” to “1111111”) through binary input. Approximately 163ps is delayed
per one step. Normal evaluation requires the binary code of “0000000” (all of OFF), so that these switches
are not mounted for shipment.
6) SW3 (Decimation)
The switch to select clock frequency decimation. Selection settings are as follows.
SW3 Decimation
3 2 1 ratio
L L L 1/1
L L H 1/2
L H L 1/4
L H H 1/8
H L L 1/16
H L H 1/32
H H L 1/64
H H H 1/128
H = ECL High level ; L = ECL Low level
7) SW4
The switch for LINV High/Low.
8) SW5
The switch for MINV High/Low.
9) SW6 (D/A INV)
The switch for D/A converter output inversion.
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