CXA3572R
Control Signal Block (Sync signal, serial-serial signal, XCLR, digital output)
(Ta = –15 to +75°C, VCC1 = VDD = 2.7 to 3.6V)
Item
High level input voltage
Low level input voltage
High level input voltage
Low level input voltage
High level input current
Low level input current
High level input current
Low level input current
High level input current
Low level input current
High level output voltage
Low level output voltage
High level output voltage
Low level output voltage
Symbol Measurement conditions Min. Typ. Max. Unit Applicable pins
VIH1
VIL1
VIH2
VIL2
VCC1 – 0.7
0
2.0
0
VCC1
0.7
V
VDD (VCC1)
0.7
∗1
∗2, ∗3, ∗4
| IIH1 | VIN = VDD
| IIL1 | VIN = 0V
20
∗1, ∗2
20
| IIH2 | VIN = VDD
| IIL2 | VIN = 0V
20
150
1.0
µA
∗3
(pull-down)
| IIH3 | VIN = VDD
| IIL3 | VIN = 0V
1.0
∗4
1.0
VOH1 IOH = –1.2mA
2.6
VOL1 IOL = 4.0mA
VOH2 IOH = –0.6mA
2.6
VOL2 IOL = 2.0mA
∗5
0.3
V
∗6
0.3
∗1 SYNC IN (Pin 25)
∗2 SEN (Pin 31), SCK (Pin 32), SDAT (Pin 33)
∗3 VD (Pin 34)
∗4 XCLR (Pin 35)
∗5 HCK1 (Pin 42), HCK2 (Pin 43), HST (Pin 44)
∗6 EN (Pin 1), VCK (Pin 2), VST (Pin 3), POF (Pin 36), HDO (Pin 38), VDO (Pin 39), RGT (Pin 40),
WIDE (Pin 46), DWN (Pin 47)
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