HC-49/U データシートの表示（PDF） - Sony Semiconductor

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HC-49/U

CMOS 8-bit Single Chip Microcomputer

Sony Semiconductor 

CXP750096/750010, CXP750097/750011

(6) OSD timing

(Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference)

Item

Symbol Pins Conditions Min.

Max Unit

OSD clock frequency

fOSC

HSYNC pulse width

tHWD

VSYNC pulse width

tVWD

HSYNC afterwrite rise and fall

times

tHCG

VSYNC beforewrite rise and fall

times

tVCG

EXLC

XLC

Fig. 11

HSYNC Fig. 10

VSYNC Fig. 10

HSYNC Fig. 10

VSYNC Fig. 10

4

30/fc

1

40.8 MHz

µs

H∗2

200 ns

1.0 µs

∗1 The maximum value of fosc is specified with the following equation.

fosc [max] ≤ fc × 1.7

∗2 H indicates 1HSYNC period.

HSYNC

For OSD I/O polarity register

(OPOL: 001FEh)

bit 7 at “0”

tHWD

tHCG

0.8VDD

0.2VDD

VSYNC

For OSD I/O polarity register

(OPOL: 001FEh)

bit 6 at “0”

tVCG

tVWD

0.8VDD

0.2VDD

Fig. 10. OSD timing

EXLC

L

C1

XLC

R∗3

C2

Fig. 11. LC oscillation circuit connection

∗3 The series resistor for XLC (R = 1kΩ or less) can reduce the frequency of occurrence of the undesired

radiation.

– 21 –

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