CY7C006 データシートの表示（PDF） - Cypress Semiconductor

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CY7C006

16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

Cypress Semiconductor 

CY7C006

CY7C016

Switching Characteristics Over the Operating Range[7] (continued)

Parameter

Description

INTERRUPT TIMING[13]

7C006-15

7C016-15

7C006-25

7C016-25

7C006-35

7C016-35

7C006-55

7C016-55

Min. Max. Min. Max. Min. Max. Min. Max. Unit

tINS

INT Set Time

tINR

INT Reset Time

15

25

25

30

ns

15

25

25

30

ns

SEMAPHORE TIMING

tSOP

SEM Flag Update Pulse (OE or SEM) 10

10

15

20

ns

tSWRD

SEM Flag Write to Read Time

5

5

5

5

ns

tSPS

SEM Flag Contention Window

5

5

5

5

ns

Switching Waveforms

Read Cycle No. 1 (Either Port Address Access)[15, 16]

tRC

ADDRESS

tAA

tOHA

DATA OUT PREVIOUS DATA VALID

DATA VALID

Read Cycle No. 2 (Either Port CE/OE Access)[15, 17, 18]

SEM or CE

OE

tACE

DATA OUT

ICC

ISB

tLZOE

tLZCE

tPU

tDOE

tHZOE

DATA VALID

Notes:

15. R/W is HIGH for read cycle.

16. Device is continuously selected CE = LOW and OE = LOW. This waveform cannot be used for semaphore reads.

17. Address valid prior to or coincident with CE transition LOW.

18. CEL = L, SEM = H when accessing RAM. CE = H, SEM = L when accessing semaphores.

tHZCE

tPD

C006-10

C006-11

7

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