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CY8C20111(2009) データシートの表示(PDF) - Cypress Semiconductor

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CY8C20111 Datasheet PDF : 34 Pages
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PRELIMINARY
CY8C20111, CY8C20121
7.3 DIG_ENABLE
Select DIG Output Register
GPO_ENABLE: 08h
(Writable only in Setup mode)
1 Button
7
6
5
4
3
2
1
0
Access: FD
RW:01
Bit Name
DIG[0]
2 Button
7
6
5
4
3
2
1
0
Access: FD
RW:03
Bit Name
DIG [1:0]
This register is used to enable DIG (Digital) outputs. If DIG output is enabled, the strong drive mode register (11h) should also be set.
If DIG output is disabled the drive mode of these pins is High Z.
Bit
Name
1:0
DIG [1:0]
Description
These bits are used to enable DIG outputs.
0
Disable DIG output
1
Enable DIG output
7.4 SET_STRONG_DM
Sets Strong Drive Mode for DIG Outputs.
SET_STRONG_DM: 11h
(Writable only in Setup mode)
1 Button
7
6
5
4
3
2
1
0
Access: FD
RW:01
Bit Name
DM [0]
2 Button
7
6
5
4
3
2
1
0
Access: FD
RW:03
Bit Name
DM [1:0]
This register sets strong drive mode for DIG (Digital) outputs. To set strong drive mode the pin should be enabled as GP output.
Bit
Name
1:0
DM [1:0]
Description
These bits are used to set the strong drive mode to DIG outputs.
0
Strong drive mode not set
1
Strong drive mode set
Document Number: 001-53516 Rev. **
Page 10 of 34
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