FAN5033 データシートの表示（PDF） - Fairchild Semiconductor
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FAN5033 Datasheet PDF : 39 Pages
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Electrical Characteristics (Continued)
VCC = 12V, FBRTN = GND, and TA = +25°C. The • denotes specifications that apply over the full operating
temperature range.
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
OD Output
VOL(ODB) Output Voltage Low
VOH(ODB) Output Voltage High
Power Good Comparator
VPWRGD(UV)
Under-Voltage
Threshold
VPWRGD(OV)
Over-Voltage
Threshold
VOL(PWRGD) Output Low Voltage
tPWRGD
Power Good Delay
Time
VCROWBAR
Crowbar Trip Point
Crowbar Reset Point
IPWM(SINK) = 400μA
IPWM(SOURCE) = 400μA
•
160 400 mV
•4
5
V
Relative to Nominal DAC Output
• -300 -250 -200 mV
Relative to Nominal DAC Output
• 100 150 200 mV
IPWRGD(SINK) = -4mA
•
200 300 mV
CDELAY = 10nF
Start-up
sequence
•
2
ms
Power Good
Blanking Time
VID code
Changing
•
250
µs
VID Code Static • 100 200
ns
Relative to Nominal DAC Output
• 100 150 200 mV
Relative to FBRTN
• 250 300 350 mV
Over-voltage to
PWM going low
VID code Change • 100 250
µs
tCROWBAR Crowbar Delay Time
Crowbar Blanking
Time
VID Code Static •
400
ns
PWM Outputs
VOL(VRTM) Output Voltage Low
IPWM(SINK) = 400μA
•
160 400 mV
VOH(VRTM) Output Voltage High
IPWM(SOURCE) = 400μA
•4
5
V
Phase Disable Voltage
Applicable to PWM3 pins only. Connect
this pin to VCC to disable the phase.(3)
• VCC -.1
V
Input Supply
VCC
DC Supply Current
EN = Logic HIGH
•
8
12 mA
VUVLO UVLO Threshold
VCC rising
• 6.5 6.9 7.3
V
VULVOLHYS UVLO Hysteresis
• 0.7 0.9 1.1
V
Notes:
1. All limits at operating temperature extremes are guaranteed by design, characterization, and statistical quality
control.
2. AC specifications guaranteed by design and characterization; not production tested.
3. To operate FAN5033 with fewer than three phases, PWM3 should be connected to VCC to disable this phase.
See the “Theory of Operation” section for details.
© 2006 Fairchild Semiconductor 2006
FAN5033 Rev. 1.0.0
8 of 39
www.fairchildsemi.com
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