IS93C46A IS93C56A IS93C66A
AC WAVEFORMS
FIGURE 4. SYNCHRONOUS DATA TIMING
tCS
CS
SK
DIN
1 00 1
1
DOUT = 3-state
ISSI ®
FIGURE 5. WRITE (WRITE) CYCLE TIMING
CS
SK
DIN
DOUT
tCS
1 0 1 An
A0 Dm
D0
tSV
tDF
BUSY
tWP
READY
Notes:
To determine address bits An-A0 and data bits Dm-Do, see Instruction Set for the specific device.
10
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. A
11/12/02