K8A1215ETC データシートの表示（PDF） - Samsung
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K8A1215ETC Datasheet PDF : 84 Pages
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K8A12(13)15ET(B/Z)C
Rev. 1.1
datasheet NOR FLASH MEMORY
512M Bit (32M x16) Synch Burst, Multi Bank SLC NOR Flash Memory
1.0 FEATURES
2.0 GENERAL DESCRIPTION
• Single Voltage, 1.7V to 1.95V for Read and Write operations
• Organization
- 33,554,432 x 16 bit (Word Mode Only)
• Read While Program/Erase Operation
• Multiple Bank Architecture
- 16 Banks (32Mb Partition)
• OTP Block : Extra 512-Word block
• Read Access Time (@ CL=30pF)
- Asynchronous Random Access Time : 100ns
- Synchronous Random Access Time :95ns
- Burst Access Time :
11ns(66Mhz) / 9ns(83Mhz) / 7ns (108MHz) / 6ns (133MHz)
• Page Mode Operation
16Words Page access allows fast asynchronous read
Page Read Access Time :
18ns(66/83Mhz) / 15ns(108/133Mhz)
• Burst Length :
- Continuous Linear Burst
- Linear Burst : 8-word & 16-word with Wrap
• Block Architecture
- Uniform block part (K8A(10/11/12/13)15EZC) :
Five hundred twelve 64Kword blocks
- Boot block part (K8A(10/11/12/13)15ET(B)C) :
Four 16Kword blocks and five hundred eleven 64Kword blocks (Bank 0
contains four 16 Kword blocks and thirty-one 64Kword blocks, Bank 1 ~
Bank 15 contain four hundred eighty 64Kword blocks)
• Reduce program time using the VPP
• Support 512-word Buffer Program
• Power Consumption (Typical value, CL=30pF)
- Synchronous Read Current : 35mA
- Program/Erase Current : 25mA
- Read While Program/Erase Current : 45mA
- Standby Mode/Auto Sleep Mode : 30uA
• Block Protection/Unprotection
- Using the software command sequence
- Last two boot blocks are protected by WP=VIL
(Boot block part : K8A(10/11/12/13)15ET(B)C)
- Last one block (BA511) is protected by WP=VIL
(Uniform block part : K8A(10/11/12/13)15EZC)
- All blocks are protected by VPP=VIL
• Handshaking Feature
- Provides host system with minimum latency by monitoring RDY
• Erase Suspend/Resume
• Program Suspend/Resume
• Unlock Bypass Program/Erase
• Hardware Reset (RESET)
• Deep Power Down Mode
• Data Polling and Toggle Bits
- Provides a software method of detecting the status of program
or erase completion
• Endurance
- 100K Program/Erase Cycles Minimum
• Extended Temperature : -25°C ~ 85°C
• Support Common Flash Memory Interface
• Output Driver Control by Configuration Register
• Low Vcc Write Inhibit
• Package : TBD
The K8A(10/11/12/13)15E featuring single 1.8V power supply is a 512Mbit
Muxed Burst Multi Bank Flash Memory organized as 32Mx16. The memory
architecture of the device is designed to divide its memory arrays into
512blocks(Uniform block part)/515blocks(Boot block part) with indepen-
dent hardware protection. This block architecture provides highly flexible
erase and program capability. The K8A(10/11/12/13)15E NOR Flash con-
sists of sixteen banks. This device is capable of reading data from one
bank while programming or erasing in the other bank. Regarding read
access time, the K8A10/1215E provides an 11ns burst access time and an
95ns initial access time at 66MHz. At 83MHz, the K8A10/1215E provides
an 9ns burst access time and an 95ns initial access time. At 108MHz, the
K8A11/1315E provides an 7ns burst access time and an 95ns initial access
time. At 133MHz, the K8A11/1315E provides an 6ns burst access time and
an 95ns initial access time. The device performs a program operation in
units of 16 bits (Word) and erases in units of a block. Single or multiple
blocks can be erased. The block erase operation is completed within typi-
cally 0.6sec. The device requires 25mA as program/erase current in the
extended temperature ranges.
The K8A(10/11/12/13)15E NOR Flash Memory is created by using Sam-
sung's advanced CMOS process technology.
3.0 PIN DESCRIPTION
Pin Name
A0 - A24
DQ0 - DQ15
CE
OE
RESET
VPP
WE
WP
CLK
RDY
AVD
DPD
Vcc
VSS
Pin Function
Address Inputs
Data input/output
Chip Enable
Output Enable
Hardware Reset Pin
Accelerates Programming
Write Enable
Hardware Write Protection Input
Clock
Ready Output
Address Valid Input
Deep Power Down
Power Supply
Ground
-4-
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