LC7233N データシートの表示（PDF） - SANYO -> Panasonic

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LC7233N

Single-Chip PLL and Microcontroller with LCD Driver

SANYO -> Panasonic 

LC7233N

Port H

These output ports are high-voltage, n-channel open-

drain drivers, which are used for switching power

supplies. Upon reset and in standby mode, outputs are

high impedance. Port H can also be configured as the

output of DAC1 and DAC2.

A/D Converter

The A/D converter is a 6-bit successive approximation

type. The conversion cycle time is 1.28 ms. Full-scale

output data is 3FH for an input of (63/96) × VDD.

Power-fail Detection

When connected to the supply, SNS is used as a power-

fail detector. SNS can also be used as a standard input

port.

Crystal Oscillator

The master crystal oscillator, which has a feedback

resistor on-chip, requires only the connection of a 4.5

MHz crystal.

Low-power Modes

Hold mode

When the hold-mode control pin, HOLD, is driven LOW

and the HOLDEN (hold enable) flip-flop has previously

been set by an SS instruction, the LC7233N enters hold

mode.

HOLD has a high-voltage input (VIH(max) = 8.0 V)

which can be connected directly to the power supply.

Standby mode

When the LC7233N is in hold mode and HOLD is LOW,

standby mode can be set by the CKSTP instruction.

Test Pins

Two device test pins are provided-TEST1 and TEST2.

These should either be tied to VSS or left open.

Instruction Set

ADDR

b

B

C

DH

DL

I

M

N

Pn

r

Rn

()

( )n

Program memory address [12 bits]

Borrow

Bank number [2 bits]

Carry

Data memory address high-order bits (row address) [2 bits]

Data memory address low-order bits (column address) [4 bits]

Immediate data [4 bits]

Data memory address

Bit position [4 bits]

Port number [4 bits]

General register (Bank 0 addresses 00H to 0FH)

Register number [4 bits]

Contents of register or memory

Contents of bit N of register or memory

No.4117–8/12

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