LH7A400N0G000B5 データシートの表示（PDF） - NXP Semiconductors.
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LH7A400N0G000B5 Datasheet PDF : 63 Pages
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LH7A400
NXP Semiconductors
32-Bit System-on-Chip
Table 3. Functional Pin List (Cont’d)
BGA
PIN
F6
F5
G1
G2
G4
G5
H1
H2
H3
LFBGA
PIN
SIGNAL
G2 COL0
G1 COL1
H3 COL2
H5 COL3
H6 COL4
H7 COL5
H2 COL6
H1 COL7
J1 TBUZ
C3
F5 MEDCHG
P11 T14 WIDTH0
R12 T15 WIDTH1
D1
E3 BATOK
D2
F6 nBATCHG
A1
E5 TDI
B1
C2 TCK
B2
D3 TDO
C1
C1 TMS
T12 P15 nTEST0
R15 P13 nTEST1
DESCRIPTION
RESET
STATE
Keyboard Interface
HIGH
Timer Buzzer (254 kHz MAX.)
Boot Device Media Change. Used with WIDTH0
and WIDTH1 to specify boot memory device.
External Memory Width Pins. Also, used with
MEDCHG to specify the boot memory device size.
The pins must be pulled HIGH with a 33 k resistor.
Battery OK
Battery Change
JTAG Data In. This signal is internally pulled-up t
o VDD.
JTAG Clock. This signal should be externally
pulled-up to VDD with a 33 k resistor.
JTAG Data Out. This signal should be externally
pulled up to VDD with a 33 k resistor.
JTAG Test Mode select. This signal is internally
pulled-up to VDD.
Test Pin 0. Internally pulled up to VDD. For Normal
mode, leave open. For JTAG mode, tie to GND.
See Table 4.
Test Pin 1. internally pulled up to VDD. For Normal
and JTAG mode, leave open. See Table 4.
LOW
Input
Input
Input
Input
Input
Input
High-Z
Input
Input
STANDBY
STATE
OUTPUT
DRIVE
I/O
NOTES
HIGH
8 mA O
LOW
8 mA O
No Change
I
3
No Change
I
3
No Change
No Change
No Change
I
3
I
3
I
4
No Change
I
3
No Change 4 mA O
No Change
I
4
No Change
I
4
1. Signals beginning with ‘n’ are Active LOW.
2. The SCLK pin can source up to 12 mA and sink up to 20 mA. See ‘DC Characteristics’.
3. Schmitt trigger input; see ’DC Specifications’, page 31 for triggers points and hysteresis.
4. Input only for JTAG boundary scan mode.
5. Output only for JTAG boundary scan mode.
6. The internal pullup and pull-down resistance on all digital I/O pins is 50 k
7. When used as SMBCLK, this pin must have a resistor.
8. The RESET STATE is defined as the state during power-on reset.
9. The STANDBY STATE is defined as the state when the device is in standby. During this state,
I/O cells are forced to input (Input), output driving low (LOW), output driving high (HIGH), or their
current state is preserved (No Change). In some case, function selection has an overall effect on the standby state.
10. All unused USB Device pins with a differential pair must be pulled
to ground with a 15 k resistor.
Table 4. nTest Pin Function
MODE
JTAG
Normal
nTEST0
0
1
nTEST1
1
1
nURESET
1
x
12
Rev. 02 — 19 March 2009
Product data sheet
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