M27C801-120F6X データシートの表示（PDF） - STMicroelectronics
部品番号
コンポーネント説明
メーカー
M27C801-120F6X Datasheet PDF : 16 Pages
| |||
M27C801
Table 7. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%)
Symbol
Parameter
Test Condition
Min
ILI
Input Leakage Current
0V ≤ VIN ≤ VCC
ILO
Output Leakage Current
0V ≤ VOUT ≤ VCC
ICC
Supply Current
E = VIL, GVPP = VIL,
IOUT = 0mA, f = 5MHz
ICC1 Supply Current (Standby) TTL
E = VIH
ICC2 Supply Current (Standby) CMOS
E > VCC – 0.2V
IPP
Program Current
VPP = VCC
VIL
Input Low Voltage
–0.3
VIH (2) Input High Voltage
2
VOL Output Low Voltage
IOL = 2.1mA
Output High Voltage TTL
VOH
Output High Voltage CMOS
IOH = –1mA
IOH = –100µA
3.6
VCC – 0.7
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.
Max
±10
±10
35
1
100
10
0.8
VCC + 1
0.4
Unit
µA
µA
mA
mA
µA
µA
V
V
V
V
V
Table 8A. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%)
Symbol Alt
Parameter
Test
Condition
M27C801
-45 (3)
-60
-70
Unit
Min Max Min Max Min Max
tAVQV tACC Address Valid to Output Valid
E = VIL,
GVPP = VIL
45
60
70 ns
tELQV tCE Chip Enable Low to Output Valid GVPP = VIL
45
60
70 ns
tGLQV tOE Output Enable Low to Output Valid E = VIL
25
30
35 ns
tEHQZ (2) tDF Chip Enable High to Output Hi-Z
GVPP = VIL 0
25
0
25
0
30 ns
tGHQZ (2) tDF Output Enable High to Output Hi-Z E = VIL
0 25 0 25 0 30 ns
tAXQX
tOH
Address Transition to Output
Transition
E = VIL,
GVPP = VIL
0
0
0
ns
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
5/16
Share Link: 