MAX11328 データシートの表示（PDF） - Maxim Integrated

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MAX11328

1Msps, 10-/12-Bit, 4-/8-/16-Channel ADCs with Post-Mux External Signal Conditioning Access

Maxim Integrated 

MAX11321–MAX11328

1Msps, 10-/12-Bit, 4-/8-/16-Channel ADCs with

Post-Mux External Signal Conditioning Access

UP TO N INTERNALLY

CLOCKED ACQUISITIONS

AND CONVERSIONS

CNVST

tCSW

CS

EOC

tCNV_INT

SCLK

DIN

1

16

1

16

SET MODE REG

SET MODE REG

DOUT

INTERNAL

OSCILLATOR ON

SCAN OPERATION AND

RESULTS STORED IN FIFO

READ DATA FROM FIFO

READ DATA FROM FIFO

Figure 6. Internal Conversions with CNVST

CS

EOC

SCLK

1

DIN

DOUT

UP TO N INTERNALLY

CLOCKED ACQUISITIONS

AND CONVERSIONS

tCNV_INT

(N = 1)

17

1

SET MODE REG

SWCNV = 1

MODE CONTROL

INTERNAL OSCILLATOR ON

SCAN OPERATION AND

RESULTS STORED IN FIFO

16

SET MODE REG

READ DATA FROM FIFO

Figure 7. Internal Conversions with SWCNV

Maxim Integrated

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